Panasonic Corporation

Panasonic Intellectual Property Management Co., Ltd.

Junnei Baba

Tetsuya Ashizuka

Masakazu Hoashi

Naoya Imahashi

Yoshihito Yamamoto

Ichiro Komaki

Masatoshi Ootsuka

The antenna device includes a first antennathat includes a first ground terminal; a second antennathat includes a second ground terminal; a ground conductorto which the first antennais connected through the first ground terminaland the second antennais connected through the second ground terminal; and a phase shifterthat controls a phase difference between a first current ieand a second current ie. The phase shiftercontrols the phase difference between the first current ieand the second current ieso that the first current ieand the second current iehave components to cancel each other.

Antenna device and wireless communication apparatus

An antenna apparatus that can be miniaturized without causing inference caused by antenna currents to be occurred if the high band of a dual band wireless system is close to the band of another wireless system in a wireless communication apparatus incorporating the dual band wireless system and another wireless system is provided. A first switchblocks passage of a signal of a high band (first frequency) and allows passage of a signal of a low band (second frequency). A second switchblocks passage of a signal of the low band (second frequency) and allows passage of a signal of the high band (first frequency). Accordingly, the antenna apparatus operates as a dipole antenna with no antenna current flowing into a feeder line at the first frequency and operates as a monopole antenna wherein a radiation element and a feeder line making up the dipole antenna becomes a radiation element at the second frequency lower than the first frequency.

Antenna apparatus

In a synchronous detection circuit, an interpolation circuit regulates an interpolation calculation coefficient based on phase shift information when carrying out interpolation calculation processing over a digitally converted received signal. A sampling circuit samples interpolation data using a recovered clock as a reference and two clocks having phases which are advanced and delayed with respect to the recovered clock. A phase shift detecting circuit monitors a phase shift using three sampling data output from the sampling circuit and outputting phase shift information to the interpolation circuit when detecting a predetermined phase shift. A demodulating circuit performs demodulation processing using the data subjected to the sampling with the recovered clock output from the sampling circuit. Where a synchronous shift is detected, the interpolation circuit performs regulation to match a timing having a maximum signal-to-noise ratio and the recovered clock based on the amount of the phase shift.

Synchronous detecting circuit

Growing community of inventors

Fukuoka, Japan

Junnei Baba