Suteng Innovation Technology Co., Ltd.

Smsc Holdings Sarl

Junling Zang

Yumin Liao

Wei Fu

Christopher T Thomas

Yanggao Qiu

Renfang Huang

Yueqing Yang

This application relates to a method, circuit, and radar for detecting a register. The method for detecting the register includes: performing a signature operation on a first data to obtain a first signature; storing the first data in a data register; performing a signature operation on a second data stored in the data register, to obtain a second signature; and comparing the first signature and the second signature to detect the data register.

Method, circuit and radar for detecting a register

A detection circuit of clock anomaly and method, a clock circuit, a chip, and a radar are provided. The detection circuit of clock anomaly includes: a first clock frequency determining unit, configured to determine a first clock frequency of a received first clock signal; a reference determining unit, configured to determine a reference corresponding to the first clock signal, where the reference is determined based on a second clock signal or a timestamp; and a clock anomaly detection unit, connected to the first clock frequency determining unit and the reference determining unit separately and configured to perform anomaly detection on the first clock signal based on the first clock frequency and the reference. This application can improve reliability of the clock signal, thereby improving personal safety and property safety of a user.

Detection circuit of clock anomaly and method, clock circuit, chip and radar

Systems and methods are disclosed for improving the accuracy of phase spacing of multiphase clocks. In one example, method includes receiving a reference clock having a first frequency and sampling the reference clock with a plurality of multiphase clocks having a second frequency to generate a plurality of samples. The second frequency is a non-integer multiple of the first frequency. The method also includes detecting transitions of the reference clock occurring between the samples generated from a plurality of pairs of the multiphase clocks and counting the transitions to generate a transition count for each pair of the multiphase clocks. The method also includes summing a set of the transition counts to generate a measured phase for a first multiphase clock, calculating a reference phase for the first multiphase clock, and generating a phase skew value for the first multiphase clock based on the measured phase and the reference phase.

Multiphase clock generation and calibration

Growing community of inventors

Shenzhen, China

Junling Zang