Tdk Corporation

National Institute of Advanced Industrial Science and Technology

Other

Samsung Electronics Co., Ltd.

Elpida Memory, Inc.

Agency of Industrial Science and Technology

Dainichiseika Color & Chemicals Mfg. Co., Ltd.

Samsung Japan Corporation

Hitachi, Ltd.

Nitto-Denko Corporation

Toshiba Memory Corporation

Minolta Company, Ltd.

University of Tsukuba

Adk Corporation

J. a. Woolam Japan Corporation

Junji Tominaga

Nobufumi Atoda

Takashi Kikukawa

Susumu Haratani

Takayuki Shima

Takashi Nakano

Masashi Kuwahara

Alexander Kolobov

Ryo Inaba

Joo-Ho Kim

Tokuhiko Handa

Paul Fons

Makoto Takahashi

Hiroshi Fuji

Isamu Kuribayashi

Robert Simpson

Hiroyuki Katayama

Hiroyuki Arioka

Narutoshi Fukuzawa

Tatsuhiro Kobayashi

James Paul Fons

Kenji Ohta

Isamu Asano

Yuta Saito

Norio Tanaka

Ichiro Ueno

Takashi Hiraga

Akira Sato

Koji Tsujita

Hiromitsu Yanagimoto

Tetsuo Moriya

Kazuma Kurihara

Reiko Kondo

Kazuo Aizawa

Toshio Fukaya

Qiying Chen

In-sik Park

Tatsuya Kato

Toshimichi Shintani

Takuji Hatano

Akio Ogawa

Kunifumi Suzuki

In-oh Hwang

Susumu Soeya

Masanori Kosuda

Michio Suzuki

Manami Kuiseko

Tsuneo Kuwahara

Ichiro Suehiro

Koichi Tsutsumi

Makoto Fujimaki

Joo-ho Kim

Takahiro Odaka

Atsuko Motai

Kazuya Fujioka

Hideki Dohi

Muneaki Hase

Kotaro Makino

Rie Endo

Masahiro Susa

Yuzo Yamakawa

Yasuhiko Iwanabe

Takayuki Sima

Hisako Fukuda

Jooho Kim

Dorothea Buechel

Christophe Mihalcea

Motoichi Ohtsu

Motonobu Kourogi

Koji Yasukawa

A method of initializing a multiferroic element for obtaining a stable element operation includes applying at least one selected from a group consisting of an electric field and a magnetic field to the multiferroic element under a temperature condition equal to or higher than a phase transition temperature. The multiferroic element has a laminated structural body including a first alloy layer and a second alloy layer. The first alloy layer is formed by using any of antimony-tellurium, bismuth-tellurium and bismuth-selenium as a principal component. The second alloy layer is laminated on the first alloy layer, and formed by using a compound represented by the following general formula (1) as a principal component. The second alloy layer is configured to undergo phase transition between a reset phase and a set phase. Electric polarization is not caused in the reset phase, but caused in the set phase. The second alloy layer undergoes the phase transition from the reset phase to the set phase at the phase transition temperature. [Chemical Formula 1]MTe&#x2003;&#x2003;(1)Here, in the above-mentioned general formula (1), M represents an atom of any of germanium, aluminum and silicon, and x represents a numerical value of 0.5 or more and lower than 1.

Method of initializing multiferroic element

A crystal orientation layer laminated structure capable of widely selecting materials for a base substrate and an electrode substrate, an electronic memory using the crystal orientation layer laminated structure and a method for manufacturing the crystal orientation layer laminated structure are provided. The crystal orientation layer laminated structure according to the present invention has such a feature as including a substrate, including an orientation control layer which is laminated on the substrate, which is made of any of germanium, silicon, tungsten, germanium-silicon, germanium-tungsten and silicon-tungsten, and whose thickness is at least 1 nm or more, and including a first crystal orientation layer which is laminated on the orientation control layer, which is made of any of SbTe, SbTe, BiTe, BiTe, BiSe and BiSeas a main component, and which is oriented in a certain crystal orientation.

Crystal orientation layer laminated structure, electronic memory and method for manufacturing crystal orientation layer laminated structure

A spin electronic memory of the present invention includes: a pair of electrodes, recording layers, andbetween the electrodesand, the recording layer being formed by laminating first alloy layerand second alloy layer, the first alloy layerbeing formed to contain any one of SbTe, SbTe, BiTe, BiTe, BiSe, and BiSeas a principal component and to have a thickness of 2 nm to 10 nm, the second alloy layerbeing formed to contain an alloy expressed by general formula (1) as a principal component; and spin injection layerformed with a magnetic material to inject a spin into the recording layer with the magnetic material being magnetized,MTe&#x2003;&#x2003;(1)

Spin electronic memory, information recording method and information reproducing method

A memory device according to an embodiment includes an insulating layer containing silicon, an interface layer provided on the insulating layer and containing a chalcogenide compound of a transition metal, and a conductive layer provided on the interface layer, containing antimony or bismuth, and having a superlattice structure.

Memory device

Recording and erasing of data in PRAM have hitherto been performed based on a change in physical characteristics caused by primary phase-transformation of a crystalline state and an amorphous state of a chalcogen compound including Te which serves as a recording material. Since, however, a recording thin film is formed of a polycrystal but not a single crystal, a variation in resistance values occurs and a change in volume caused upon phase-transition has placed a limit on the number of times of readout of the record. In one embodiment, the above problem is solved by preparing a solid memory having a superlattice structure with a thin film containing Sb and a thin film containing Te. The solid memory can realize the number of times of repeated recording and erasing of 10.

Solid memory

Recording and erasing of data in PRAM have hitherto been performed based on a change in physical characteristics caused by primary phase-transformation of a crystalline state and an amorphous state of a chalcogen compound including Te which serves as a recording material. Since, however, a recording thin film is formed of a polycrystal but not a single crystal, a variation in resistance values occurs and a change in volume caused upon phase-transition has placed a limit on the number of times of readout of record. In one embodiment, the above problem is solved by preparing a solid memory having a superlattice structure of thin films including Ge and thin films including Sb. The solid memory can realize the number of times of repeated recording and erasing of 10.

A solid-state memory that requires a lower current during recording and erasing data and can repeatedly rewrite data an increased number of times. In at least one example embodiment, the solid-state memory includes a recording layer that includes a laminated structure in which electric properties are changed in response to a phase separation. The laminated structure includes a film containing an Sb atom(s) and a film containing a Ge atom(s), which films constitute a superlattice structure. In the laminated structure, phase separation of the film containing the Sb atom and the film containing the Ge atom allows data to be recorded and erased efficiently.

Superlattice recording layer for a phase change memory

A phase-change memory and a semiconductor recording reproducing device capable of reducing consumed power are provided. A SnTe/SbTeSL film obtained by depositing a SnTefilm and a SbTefilm layer by layer contains a SnTe/SbTesuperlattice phase formed of SnTe and SbTe, a SnSbTe alloy phase, and a Te phase. The SnTe/SbTesuperlattice phase is diluted by the SnSbTe alloy phase and the Te phase. Here, X of the SnTefilm is represented by 4 at. %&#x2266;X&#x2266;55 at. %.

Phase-change memory and semiconductor recording/reproducing device

Allowing the rate of phase change to be controlled at the time period of phonons (approx. 270 fs) for the purpose of achieving a substantially higher recording-erasing speed compared to what can be achieved with conventional technologies relating to optical recording media using phase change. A femtosecond pulse laser is shaped into pulse trains each having a first pulse and a second pulse using a Michelson interferometer, and the time interval of first and second pulses is matched with the time period of lattice vibration of a material constituting the phase change recording film to be irradiated, thereby inducing phase change.

Phase change device having phase change recording film, and phase change switching method for phase change recording film

An etching resist has a first heat-generating layer, a second heat-generating layer, and a metal compound layer including a metallic oxynitride layer containing a metallic oxynitride. The first heat-generating layer, the metallic oxynitride layer, and the second heat-generating layer are directly or indirectly laminated such that the metallic oxynitride layer is positioned between the first heat-generating layer and the second heat-generating layer.

Etching resist

A method of at least one embodiment of the present invention of manufacturing a solid-state memory is a method of manufacturing a solid-state memory, the solid-state memory including a recording film whose electric characteristics are varied by phase transformation, the method including: forming the recording film by forming a laminate of two or more layers so that a superlattice structure is provided, each of the layers having a parent phase which shows solid-to-solid phase-transformation, the recording film being formed at a temperature not lower than a temperature highest among crystallization temperatures of the parent phases. It is thus possible to manufacture a solid-state memory which requires lower current for recording and erasing data and has a greater rewriting cycle number.

Solid-state memory manufacturing method

A solid memory may include a recording layer including Ge, Sb and Te as major components. The recording layer may include a superlattice. The recording layer may include multi-layers each having a parent phase showing a phase transformation in solid-states, the phase transformation causing change in electrical property of the recording layer. The recording layer may include an SbTelayer that includes at least one period of a first lamination of a first Te-atomic layer, a first Sb-atomic layer, a second Te-atomic layer, a second Sb-atomic layer, and a third Te-atomic layer in these order, a GeTe layer that includes at least one period of a second lamination of a fourth Te-atomic layer and a Ge-atomic layer, and an Sb layer that includes a plurality of Sb-atomic layers.

Solid-state memory and semiconductor device

To include a superlattice laminate having laminated thereon a first crystal layer of which crystal lattice is a cubic crystal and in which positions of constituent atoms are reversibly replaced by application of energy, and a second crystal layer having a composition different from that of the first crystal layer, and an orientation layer that is an underlaying layer of the superlattice laminate and causes a laminated surface of the first crystal layer to be (111)-orientated. According to the present invention, the laminated surface of the first crystal layer can be (111)-orientated by using the orientation layer as an underlaying layer. In the first crystal layer of which laminated surface is (111)-orientated, a crystal structure reversibly changes when a relatively low energy is applied. Therefore, characteristics of a superlattice device having this crystal layer can be enhanced.

Superlattice device, manufacturing method thereof, solid-state memory including superlattice device, data processing system, and data processing device

A solid-state memory device includes: a superlattice laminate having plural crystal layers laminated therein, the crystal layers including first and second crystal layers having mutually opposite compositions; a lower electrode provided on a first surface in a laminating direction of the superlattice laminate; and an upper electrode provided on a second surface of the superlattice laminate in the laminating direction. The first crystal layer included in the superlattice laminate is made of a phase change compound. According to the present invention, the superlattice laminate laminated in opposite directions of the upper and lower electrodes is sandwiched between these electrodes. Therefore, when an electric energy is applied to the superlattice laminate via these electrodes, a uniform electric energy can be applied to a laminated surface of the superlattice laminate. Accordingly, fluctuation of a resistance is small even when information is repeatedly rewritten, and data can be read stably as a result.

Solid-state memory device, data processing system, and data processing device

An apparatus for optical measurement of a liquid or molten material, which has: a transparent container which has a bottom face and is capable of containing a to-be-measured material therein, with the bottom face at least having a flat face and being transparent; and an optical device that irradiates a light to the bottom face of the container and that detects and measures a reflected light from the bottom face; and a method for optically measuring a liquid or molten material using the apparatus.

Optical measurement apparatus and optical measurement method for a liquid or molten material

Growing community of inventors

Tsukuba, Japan

Junji Tominaga