Hitachi, Ltd.

Renesas Technology Corp.

Elpida Memory, Inc.

Agency of Industrial Science and Technology

Hitachi Vlsi Engineering Corp.

Opnext Japan, Inc.

Junji Shigeta

Yasunari Umemoto

Osamu Kagaya

Masataka Shirai

Kazuhiko Kajigaya

Takeshi Sakata

Riichiro Takemura

Satoru Hanzawa

Keizo Suzuki

Shinichiro Kimura

Tetsuo Ono

Masahiro Aoki

Hiroshi Masuda

Kimio Tatsuno

Hiroki Yamashita

Kiichi Ueyanagi

Kozo Katayama

Takanori Yamazoe

Yoshinori Imamura

Noboru Masuda

Shinji Tsuji

Hideo Arimoto

Nobuhiro Oodaira

Shinichi Nakatsuka

Hiroyuki Takazawa

Nobuo Kotera

Hirotoshi Tanaka

Katsuhiko Mitani

Norikazu Hashimoto

Mitsuhiro Mori

Tetsu Oi

Hidekazu Okuhira

Nobuo Miyamoto

Susumu Hiraoka

Nobutaka Nagasaki

Takashi Tase

Takuma Tanimoto

Eiji Yamasaki

Hiroto Oda

Yukihiro Kawata

Muneyasu Nakashima

In a memory array structured of memory cells using a storage circuit STC and a comparator CP, either one electrode of a source electrode or a drain electrode of a transistor, whose gate electrode is connected to a search line, of a plurality of transistors structuring the comparator CP is connected to a match line HMLr precharged to a high voltage. Further, a match detector MDr is arranged on a match line LMLr precharged to a low voltage to discriminate a comparison signal voltage generated at the match line according to the comparison result of data. According to such memory array structure and operation, comparison operation can be performed at low power and at high speed while influence of search-line noise is avoided in a match line pair. Therefore, a low power content addressable memory which allows search operation at high speed can be realized.

Semiconductor integrated circuit device

In a semiconductor integrated circuit device equipped with a flash memory and an EEPROM which are nonvolatile memories, the invention provides a technique that makes it possible to restrict an EEPROM capacity to a minimum necessary amount and reduce a chip area. Data of a minimal size required for one application program and rewritten frequently is stored in the EEPROM, and the EEPROM is configured to have a capacity of about that minimal size. Data of the same size that are respectively handled by other applications and rewritten frequently are stored in the flash memory. With respect to an application that is actually used, its data stored in the flash memory is transferred to the EEPROM and used. Data transfer between the flash memory and the EEPROM is performed if necessary. Consequently, the EEPROM capacity can be reduced and chip area reduction can be achieved.

Semiconductor integrated circuit device, IC card, and mobile terminal

An optical transmitter-receiver is provided which is suitable for a high-speed optical communication system. A high-frequency electric line on a mounting substrate becomes a traveling-wave electrode of a semiconductor optical element equivalently by the following steps: separately manufacturing the mounting substrate having the high-frequency electric line, and the semiconductor optical element for which high-frequency design has been applied beforehand; and then bonding and mounting of drive electrodes of the mounting substrate and the semiconductor optical element through a soldering material. In addition, it is also possible to have a configuration in which not only junction down mounting of high-frequency semiconductor optical elements, but also that of an electronic element for electrically driving and controlling a light source such as a semiconductor laser and for electrically driving and controlling a high-frequency semiconductor optical element, is performed on the mounting substrate.

Optical transmitter, optical receiver, and manufacturing method of optical device

An optical modulator having a good reflection characteristic over a broad band is provided, with a small semiconductor chip area, by use of a semiconductor chip on which a semiconductor optical modulator is mounted. A typical example of the optical modulator has a structure in which a semiconductor chip provided with an electro-absorption semiconductor optical modulator comprising an electrode of traveling wave modulator is mounted on a dielectric substrate provided with a transmission line, and the characteristic impedance of at least a part of the transmission line is set to be greater than the output impedance of a modulator driver circuit and the impedance of an optical modulator portion. By this, a broad band optical modulator with excellent reflection characteristic can be provided by use of a semiconductor chip which is small in area.

Traveling wave optical modular

To resolve a problem in which in an optical output and wavelength monitor integrated type semiconductor laser module monolithically integrated in parallel with a plurality of semiconductor lasers, since light emitting positions of the respective semiconductor lasers differ, an allowable range of an optical incident position of the monitor is exceeded, the optical incident position of the monitor is confined in the allowable range by integrating backward optical waveguides for guiding backward beam of the respective semiconductor lasers to a narrow range at a backward end of a semiconductor chip along with the semiconductor lasers, whereby there can be easily realized a semiconductor laser module with a built-in optical monitor even in the case of the chip integrated with the plurality of semiconductor lasers and can be realized an inexpensive optical module having high function.

Optical integrated device, semiconductor laser module and optical transmitter

By forming an isolated semiconductor layer or electrode layer on a semiconductor surface between neighboring field effect transistors and element separating trenches which are deep enough to reach at least the semi-insulating substrate or the hetero junction interface on the buffer layer, low frequency oscillation of a compound semiconductor integrated circuit can be reduced. By controlling the thickness of the buffer layer having a hetero junction to at most 150 nm, the low frequency oscillation can be reduced. By forming materials separating adjacent elements with a width of at most 2 .mu.m which reach from the element region surface to the buffer layer having hetero junction so as to enclose the element regions and etched regions in the neighborhood of the elements or so as to enclose the element regions in the etched regions and by controlling the angle of the sides of the etched regions against the semiconductor layer surface to 10.degree. to 60.degree., wires can be prevented from short-circuiting.

Compound semiconductor integrated circuit and optical regenerative

A method may be used to dry etch a sample including a plurality of regions different from each other in the photo-absorption of a light having a specified wavelength using an etching gas plasma. The method is capable of selectively etching the desired material from a plurality of materials having different types of band gap energies or from a plurality of materials having different band gap energies. The method includes a step of irradiating a light having the specified wavelength on the sample for reducing an etching rate of a region having a large photo-absorption coefficient to the light, thereby selectively etching a region having a small photo-absorption coefficient to the light.

Dry etching method

An FET structure with improved .alpha.-particle immunity or soft error immunity particularly provided in a semi-insulating substrate. This structure includes some layer which can prevent both electrons and holes generated in a substrate by the incidence of .alpha.-particles from being injected into the FET.

Field effect transistor with alpha particle protection

The semiconductor integrated circuit of the present invention includes an electrode to which potential is supplied to apply an electric field to an isolation layer between similar semiconductor layers having ohmic electrodes and implanted into a compound semiconductor substrate. By this construction this invention reduces the development of temporary conduction in the isolation layer due to disturbance of potential barrier by .alpha. particles, and can improve pronouncedly the tolerance to .alpha. particle induced soft errors.

Semiconductor intergrated circuit

A semiconductor integrated circuit memory is disclosed in which a first impurity-doped layer for making circuit elements such as MESFET's and a second impurity-doped layer opposite in conductivity type to the first impurity-doped layer are formed in a semi-insulating substrate in such a manner that the second impurity-doped layer is formed under and between circuit elements for making up a memory cell array part and a peripheral circuit part, and is divided into at least first and second regions. For example, the first region formed under and between the circuit elements of the memory cell array part is made of a P-type layer which is high in carrier density, and the second region formed under and between the circuit elements of the peripheral circuit part is made of a P-type layer which is low in carrier density. The high carrier-density P-type layer formed under the memory cell array part allows a memory cell having a minimum critical charge for alpha-particles to gain satisfactory alpha-particle immunity even when the memory cell is made fine in size. Further, the low carrier-density P-type layer formed under the peripheral circuit part having a critical charge larger than that of the memory cell can improve the alpha-particle immunity of the peripheral circuit part and can suppress an increase in parasitic capacitance at the peripheral circuit part to maintain the high-speed operation of the memory.

Semiconductor integrated circuit memory

A method for producing an InSb thin film element comprising the steps of forming an InSb polycrystalline thin film on a substrate, melting and recrystallizing the InSb polycrystalline thin film at a temperature above the melting point of InSb, and disposing a diffusion source which contains at least one element selected from the group consisting of Cu, Au, Ag, Zn, Na, K, Cd, B, Li, Ca, Fe, Mg, Ba, Al and Pb and then heating the InSb thin film so as to dope it with the desired element or elements in a range in which the total quantity does not exceed a concentration of 1.times.10.sup.18 cm.sup.-3. The InSb thin film element produced by this method has a very little current noise and a high signal-to-noise ratio. Further more, simultaneous doping of the said predetermined element or said elements and sb is more effective to reduce the current noise.

Method for producing an InSb thin film element

Growing community of inventors

Fuchu, Japan

Junji Shigeta