Sandisk Technologies Inc.

Junji Oh

Masaaki Higashitani

Jayavel Pachamuthu

Hiroyuki Kinoshita

Fumiaki Toyama

Masatoshi Nishikawa

Michiaki Sano

Masanori Tsutsumi

Seiji Shimabukuro

Kensuke Yamaguchi

Shigehisa Inoue

Yuji Fukano

Yujin Terasawa

Yasuo Kasagi

Hiroaki Koketsu

Youko Furihata

Ryoichi Ehara

Hiroaki Namba

Hiromasa Susuki

Ryo Mochizuki

Makoto Dei

An alternating stack of insulating layers and electrically conductive layers, a retro-stepped dielectric material portion overlying stepped surfaces of the alternating stack, and memory stack structures extending through the alternating stack are formed over a substrate. A patterned etch mask layer including discrete openings is formed thereabove. Via cavities through an upper region of the retro-stepped dielectric material portion by performing a first anisotropic etch process. Metal plates are selectively formed on physically exposed surfaces of a first subset of the electrically conductive layers by a selective metal deposition process. A subset of the via cavities without any metal plates therein are vertically extended downward by performing a second anisotropic etch process while the metal plates protect underlying electrically conductive layers. Via cavities can be formed without punching through electrically conductive layers. Contact via structures can be formed in the via cavities by depositing at least one conductive material therein.

Three-dimensional memory device with punch-through-resistant word lines and methods for forming the same

A method of forming a semiconductor structure includes providing a dopant species selected from carbon, boron, nitrogen or oxygen into an upper portion of a semiconductor region to form a doped etch stop semiconductor material portion over a remaining semiconductor material portion, forming an overlying material portion over the etch stop semiconductor material portion, etching through the overlying material portion by an etch process that removes the overlying material portion selective to a material of the etch stop semiconductor material portion, and depositing at least one fill material over the etch stop semiconductor material portion.

Three-dimensional memory device containing etch stop structures and methods of making the same

A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers located over a substrate, the alternating stack containing a memory array region and a terrace region. Memory stack structures containing a memory film and a vertical semiconductor channel extend through the memory array region of the alternating stack. Support pillar structures extending through the terrace region of the alternating stack. The support pillar structures have different heights from each other.

Three-dimensional memory device containing support pillars underneath a retro-stepped dielectric material and method of making thereof

A switching field effect transistor and the memory devices can be formed employing a same set of processing steps. An alternating stack of insulating layers and sacrificial material layers is formed over a substrate. Memory stack structures for memory devices and gate dielectric-channel structures for the field effect transistor can be simultaneously formed in a memory region and in a transistor region, respectively. After replacement of the sacrificial material layers with electrically conductive layers, portions of the electrically conductive layers in a memory region are electrically isolated from one another to provide independently controlled control gate electrodes for the memory devices, while portions of the electrically conductive layers in the transistor region are electrically shorted among one another to provide a single gate electrode for the switching field effect transistor.

Field effect transistor with a multilevel gate electrode for integration with a multilevel memory device

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Yokkaichi, Japan

Junji Oh