Renesas Electronics Corporation

Nec Electronics Corporation

Fuji Photo Film Company, Limited

Junichi Yamada

Tatsuya Saito

Kazuo Horikawa

Masaru Noguchi

Kenji Hibino

Yasuhiro Tonda

Hidetoshi Ozoe

Mitsuyuki Kubo

Hideaki Uemura

Hiroshi Homma

Electrical characteristics of a mounting board over which a semiconductor device is mounted is improved. A mounting board (wiring board) includes a plurality of first through holes and second through holes extending from its upper surface bearing a semiconductor device (semiconductor package) to its lower surface and through-hole wirings formed in the respective through holes. The mounting board has a capacitor arranged on its lower surface and electrically connected with the semiconductor device via second electrodes. Among a plurality of first electrodes formed on the upper surface of the mounting board, the several first electrodes to be connected with the capacitor are connected with one wiring formed in a first through hole with a larger diameter than a signal transmission path.

Electronic device, test board, and semiconductor device manufacturing method

A semiconductor device includes: a plurality of word lines; a word line driver; a first detection circuit; and a control circuit. The plurality of word lines is connected to gates of a plurality of memory cell transistors, respectively. The word line driver supplies one of a selection voltage and a non-selection voltage to each of the plurality of word lines. The first detection circuit detects a first current flowing into the word line driver through a wiring supplying the selection voltage when the selection voltage is supplied to one of the plurality of word lines through the word line driver. The control circuit detects abnormality of the plurality of word lines and the word line driver based on the first current.

Semiconductor device and method of detecting abnormality on semiconductor device

A semiconductor integrated circuit includes a group of wirings routed at first to Nth (N being an integer not less than two) wiring positions sequentially arranged in parallel, each of the wirings being divided into two portions comprising a starting end side and a terminating end side; and an Mth buffer circuit that connects the starting end side of the wiring at the Mth wiring position (M being an integer that satisfies 1&#x2266;M&#x2266;K, wherein K is an integer that satisfies K&#x2266;N/2) as an input and the terminating end side of the wiring at the (M+N&#x2212;K)th wiring position as an output. The group of the wirings has a structure in which connection is switched so that the starting end side of the wiring at a Jth (J being an integer that satisfies K&#x3c;J&#x2266;N) wiring position is routed to the terminating end side of the wiring at a (J&#x2212;K)th wiring position on a wiring layer above a placement region of the buffer circuit(s). Chip occupying area of the group of wirings and the buffer circuit is reduced.

Semiconductor integrated circuit device

A voltage generator for nonvolatile memory that generates an applied voltage to be applied to a nonvolatile memory includes a first voltage generator to generate a first voltage corresponding to the applied voltage, a reference voltage generator to generate a reference voltage, a comparator to compare the first voltage with the reference voltage and output a boost operation control signal according to a comparison result, and a booster to generate the applied voltage in a pulse-like voltage waveform by starting or stopping boost operation based on the boost operation control signal. The applied voltage corresponding to the first voltage upon inversion of the boost operation control signal is varied within one pulse-like voltage waveform by varying one of the first voltage and the reference voltage.

Voltage generator for nonvolatile memory and writing and erasing method of nonvolatile memory

A non-volatile semiconductor memory device is provided with: a first memory cell including a floating gate transistor; a first bitline connected to a diffusion layer which is used as a source of the first memory cell; a second bitline connected to a diffusion layer which is used as a drain of the first memory cell; a first reference cell including a floating gate transistor; a third bitline electrically isolated from the first bitline and connected to a diffusion layer which is used as a source of the first reference cell; a read circuit identifying data stored in the first memory cell in response to a memory cell signal received from the first memory cell through the second bitline and a reference signal received from the first reference cell through the fourth bitline; and a bitline level controller controlling a voltage level of the third bitline.

Floating gate memory device with improved reference current generation

A non-volatile semiconductor memory device includes a memory cell, and a reference cell including a same structure as the memory cell. A detecting circuit detects a timing when a voltage of a reference bit line connected with the reference cell becomes lower than or equal to a setting voltage, and generates a control signal in response to the detection of the timing. A sense amplifier senses and amplifies a difference between a voltage of a bit line connected with the memory cell and a reference voltage in response to the control signal.

Non-volatile semiconductor memory device

An image scanning apparatus comprises a recording material supporting member for supporting a recording material in a straightly moveable manner, and an endlessly moveable member positioned close to the recording material supported on the supporting member for movement along straight lines parallel to the recording material at an angle with respect to the movement direction of the recording material. The recording material supporting member is moved at a velocity approximately equal to the velocity component of the endlessly moveable member in the movement direction of the recording material so that the recording material is two-dimensionally scanned by light. The endlessly moveable member is provided with a photodetector and/or a light source. When the apparatus is used for image read-out, the endlessly moveable member is provided with a single light source and a plurality of light receiving elements positioned around the light source.

Image scanning apparatus

A light detecting apparatus comprises an elongated plate-shaped light guide member having an end face at one long side as a light input face and an end face at the other long side as a light output face. N number of photomultipliers having elongated light receiving faces optically associated with N divisions of the light output face divided into N divisions in the length direction of the light output face of the light guide member are positioned for converting the light emitted from the divisions of the light output face into electric signals. The photomultipliers are connected to a correction circuit for electrically eliminating deterioration in sensitivity at least at adjacent photomultiplier side end portions of the photomultipliers.

Growing community of inventors

Kanagawa, Japan

Junichi Yamada