Casio Computer Co., Ltd.

Junichi Komuro

Tetsuya Sato

Makoto Kimura

Norihiro Hidaka

When a start signal is supplied from a processing unit, a variable-length processing unit reads out variable-length data stored in a memory unit, executes an operation instructed by instruction information stored in an instruction memory, and outputs an operation end signal to the processing unit when the operation is ended. When the processing unit receives the operation end signal, it outputs an operation result obtained by the variable-length processing means to other devices.

Data processing apparatus for operating on variable-length data

Variable length data stored in a RAM are sequentially read out by designating their addresses. It is detected whether or not the readout data is a code indicating a delimitation of, e.g., a word block, record block, file block, or the like. If it is detected that the readout data is a code indicating a delimitation, an address at that time is latched, thus forming an address table based on the latched address. The address table thus formed is utilized upon retrieval of data in the RAM, thus allowing high-speed data access.

Growing community of inventors

all off Tokyo, Japan

Junichi Komuro