Kabushiki Kaisha Toshiba

Fujifilm Corporation

Yamaichi Electronics Co., Ltd.

Junichi Asada

Masahiko Hori

Shinji Takei

Hideo Taguchi

Toshiyasu Ito

Kenji Takahashi

Kei Yamaji

Taku Nishiyama

Naohisa Okumura

Toshiharu Sakurai

Toshiyuki Hayakawa

Katsuhiko Oyama

Toshitsune Iijima

Takeshi Ikuta

Isao Baba

Kazunori Hayashi

Atsuko Seki

Hideyuki Kogure

Hiroshi Shimoe

Toshikazu Mino

Yuuta Yamada

Jun Omori

In the image extraction device, an instruction acquisition unit acquires an instruction input by a user, and an image group selection unit selects a second image group, which has a smaller number of images than a first image group, from the first image group in response to the instruction. Then, an extraction reference determination unit determines an image extraction reference when extracting an image from the second image group based on images included in the first image group, and an image extraction unit extracts one or more images, the number of which is smaller than the number of images in the second image group, from the second image group according to the image extraction reference.

Image extraction device, image extraction method, program, and recording medium

According to one embodiment, a semiconductor device includes a board, a controller chip, a semiconductor chip, a sealing portion, and a component. The board includes a first surface and a second surface opposite to the first surface, the first surface comprising a terminal. The controller chip is on the second surface of the board. The semiconductor chip is on the second surface of the board. The sealing portion integrally covers the controller chip and the semiconductor chip and does not cover a region of the second surface of the board. The component is on the region of the second surface of the board to perform an operation with respect to the outside of the semiconductor device.

Semiconductor device, and method of manufacturing semiconductor device

According to one embodiment, a semiconductor storage device includes a plate and an external connection terminal. The plate is molded in a resin mold section. A semiconductor memory chip is placed on the plate. The external connection terminal is exposed to the outer circumferential surface of the semiconductor storage device. The plate includes a plurality of exposed portions exposed to the outer circumferential surface of the resin mold section. The plurality of exposed portions is electrically insulated from each other inside the resin mold section.

Semiconductor storage device and a method of manufacturing the semiconductor storage device

Disclosed is a semiconductor device constructed such that a lead wire extending from an interposer is connected to a pad of a chip, wherein the chip is bonded to a resin molding with a high mechanical strength. In the semiconductor device of the present invention, the lead wires extending from the interposer formed of a polyimide film are connected to the pad of the chip, and the lead wires are arranged sparse. Dummy lead wires irrelevant to the electrical connection are also arranged in addition to the lead wires extending from the interposer so as to increase the total number of lead wires supporting the chip so as to permit the chipto be bonded to the resin moldingwith a high mechanical strength. The dummy lead wires mounted to the interposer together with the lead wires serve to improve the bonding strength between the resin molding and the chip.

Semiconductor device

An IC chip and overhang portions are stuck to tape by an adhesive agent layer having elasticity. A plurality of solder balls are attached to the tape. By soldering the solder balls to a printed board, a semiconductor device is mounted. In the case where a temperature cycle has been caused, thermal stress occurs between the IC chip and the printed board or between the hangover portion and the printed board because of a difference in coefficient of thermal expansion between the IC chip or the hangover portion and the printed board. However, this thermal stress is absorbed by the elasticity of the adhesive agent layer. As a result, little thermal stress is applied to solder balls. Even if the above described temperature cycle is repeated, therefore, the solder balls are electrically connected to the printed board stably over a long period of time. In addition, the area of the tape is widened by the area of the hangover portions. Accordingly, a larger number of solder balls can be attached to the tape without reducing the size of each of the solder balls.

Semiconductor device of surface mounting type and method for fabricating the same

A semiconductor package of this invention has an insulating substrates, wiring layers disposed on the surface of the insulating substrate, a semiconductor chip disposed in a device hole provided in the insulating substrate, inner-joint-conductors for connecting at least part of the bonding pads on the surface of the semiconductor chip to the corresponding inner-joint-conductors and connection lands connected to the wiring layers. The device hole is provided so that it goes through the center of the insulating substrate. The semiconductor chip is thinner than the insulating substrate. Then, this semiconductor chip is disposed in the device hole such that a bottom thereof is flush with a bottom plane of the insulating substrate. Further, this invention provides a MCM in which plural pieces of the thin semiconductor packages are laminated. In the MCM, the semiconductor packages are laminated such that top and bottom faces of the thin silicon chip are inverted. Predetermined connection lands are electrically connected to each other through a connecting conductor. This MCM has a high mechanical strength in its stacked structure and there is a low possibility that crack may occur in the package due to stress in the bending direction.

Package having very thin semiconductor chip, multichip module assembled by the package, and method for manufacturing the same

A semiconductor device comprises a semiconductor chip having a major surface, a plurality of bonding pads provided on the major surface of the semiconductor chip, an adhesive tape provided on a selected part of the major surface of the semiconductor chip, and a plurality of inner leads mounted on the adhesive tape, each adhered at a lower surface thereof to the adhesive tape. The device further comprises a wiring lead, bonding wires, and a resin-molded package. The wiring lead has at least one end portion and spaced apart from the major surface of the chip. The at least one end portion is depressed from the inner leads toward the semiconductor chip, located outside the adhesive tape and formed integral with at least one of the inner leads. The bonding wires are spaced apart from the wiring lead and connected, at one end, to upper surfaces of the inner leads other than the inner lead which is formed integral with the at least one end portion of the wiring lead, and at the other end, to the bonding pads which are provided on the chip. The resin-molded package encapsulates the semiconductor chip, the adhesive tape, the inner leads, the wiring lead and the bonding wires.

Semiconductor device utilizing a lead on chip structure

An operation assuring structure of an electronic circuit board in a connector for the electronic circuit board including an insert plate portion disposed on an end portion of an electronic circuit board and adapted to be inserted into a receiving port of a connector, a plurality of signal electronic pads arranged on a surface of the insert plate portion, and a plurality of signal contacts disposed within the receiving port of the connector and adapted to be contacted to the signal electrode pads, wherein a cut-off grounding contact, which is not conductive to the electronic circuit board, is interposed between the signal contacts within the receiving port, and the cut-off grounding contact has a length dimension enough to extend in parallel to the signal contacts and to interpose a distal end thereof between the signal electrode pads on the insert plate portion.

Operation assuring structure of electronic circuit board in connector

Outer leads are buried in a package. At least the contact portions of the outer leads which are connected to a circuit board are exposed from the package and the exposed portions make the same flat surfaces as the package surface. When forming the package, the outer leads are used as the side wall of a mold forming mold, and therefore, they are formed thicker than inner leads inside the package. Thus, the package thickness can be made equal to the thickness of the outer leads.

Process for encapsulating a semiconductor device and lead frame

Semiconductor device, lead frame and method for manufacturing

A lead frame for a semiconductor device having: first and second frame portions facing each other and spaced apart by a predetermined distance; an island (4) formed at a position sandwiched between the first and second frame portions for mounting a semiconductor chip; a pair of tie bars for integrally coupling the first frame portion and a side of the island facing the first frame portion, the pair of tie bars being formed with a predetermined space in the widthwise direction; and a pair of tie bars for integrally coupling the second frame portion and a side of the island facing the first frame portion, the pair of tie bars being formed with a predetermined space in the widthwise direction.

Lead frame for semiconductor device that prevents island torsion

A method of sealing a semiconductor device with resin includes the steps of coupling the tie bar of a lead frame to a heat sink; die bonding a semiconductor chip to the surface of the heat sink; wire bonding and electrically connecting the semiconductor chip to leads of the lead frame; placing the heat sink on the bottom surface of a cavity of a lower mold, putting an upper mold on the lower mold, and pressing down the coupling portion between the heat sink and lead frame toward the bottom surface by using a pressure member mounted on the upper mold; and injecting melted resin within the cavity defined by the upper and lower molds, and hardening the resin.

Growing community of inventors

Kanagawa, Japan

Junichi Asada