Samsung Electronics Co., Ltd.

Korea University Research and Business Foundation

Korea Advanced Institute of Science and Technology

Hl Klemove Corp.

Iucf-Hyu (Industry-University Cooperation

Junhyeok Yang

Taehwang Kong

Sungmin Yoo

Hyungmin Lee

Woojoong Jung

Jeongpyo Park

Sangho Kim

Tae-Hwang Kong

Jooseong Kim

Yunho Lee

Donghoon Jung

Huidong Gwon

Byongdeok Choi

Junhwan Jang

Minsu Kim

Kwangho Kim

Hyun-Sik Kim

Dae-Yong Kim

Donghun Heo

Chanyoung Jeong

Haejung Choi

Dokyung Lim

Jaeseung Lee

Seun Shin

Hong-hyun Bae

Jeong-hyun Cho

A voltage level detector includes a voltage divider that generates a first division voltage and a second division voltage. A first comparator compares any one of the first and second division voltages with a reference. A second comparator compares the other of the first and second division voltages with the reference. A first switch converts a connection path between the first and second division voltages and the first and second comparators based on a clock signal. A determination circuit determines, based on a first comparison signal and a second comparison signal, whether the voltage level detector is normal. A second switch converts a connection path between the first and second comparison signals and input terminals of the determination circuit based on the clock signal.

Voltage level detector performing state detection

A device includes an oscillator including at least one inductor and at least one capacitor and configured to generate, based on a positive supply voltage, an output signal oscillating in a resonance frequency of the at least one inductor and the at least one capacitor. The device further includes an oscillation detector configured to determine whether the output signal oscillates based on a clock signal and increase a loop gain of the oscillator until the output signal oscillates.

Device and method for adaptive loop gain of oscillator

A semiconductor device including a bandgap reference generator that generates a reference voltage; a switch control voltage generator that generates a first reference current based on the reference voltage, and generates an adaptive switch level voltage by distributing the first reference current to a first path and a second path, the first path including a first resistor, and the second path including a second resistor and a first bipolar junction transistor connected in series; and a switch controller that generates a switch control signal for controlling switches included in the bandgap reference generator based on the adaptive switch level voltage. The adaptive switch level voltage has a slope with respect to temperature that is greater than a base-emitter voltage of the first bipolar junction transistor.

Switch control voltage generator, bandgap reference generator, and method for generating switch voltage thereof

A semiconductor device may include: a flying capacitor connected between a first node and a second node; a first inductor having a first end connected to the flying capacitor through the first node and a second end connected to an output node; and a second inductor having a first end connected to the flying capacitor through the second node and a second end connected to the output node, wherein the semiconductor device is configurable in a plurality of different states based on a plurality of different operational phases, and wherein the flying capacitor is configured to float in a first phase, is configured to be discharged through the first inductor in a second phase that is different from the first phase, and is configured to be charged through the second inductor in a third phase that is different from the first phase and the second phase.

Semiconductor device

A DC-DC buck converter for generating an output voltage by stepping down an input voltage includes a converting circuit including a plurality of transistors, a first capacitor, a second capacitor, and an inductor, the converting circuit being configured to form a current path that varies according to a plurality of modes and a plurality of phases; and a control circuit configured to: determine a mode of the converting circuit, from among the plurality of modes, according to a first amplitude of the input voltage and a second amplitude of the output voltage, and determine an ON/OFF state of each transistor of the plurality of transistors according to the determined mode and a phase from among the plurality of phases.

DC-DC buck converter and operating method thereof

The present disclosure refers to direct current-to-direct current (DC-DC) converters and power supplies including the same. In an embodiment, a DC-DC converter includes a first switching circuit, a second switching circuit, a fourth capacitor coupled to a second node, and an inductor-capacitor (LC) filter coupled to a third node. The first switching circuit includes a first transistor coupled between a first capacitor and an input node, a second transistor coupled between the first capacitor and a second capacitor, a third transistor coupled between a first node and a third capacitor, and a fourth transistor coupled between the third capacitor and a ground node. The second switching circuit includes a fifth transistor coupled between the second capacitor and the third capacitor, a sixth transistor and a seventh transistor coupled between the first capacitor and the third capacitor, and an eighth transistor coupled between the first capacitor and the ground node.

DC-DC converter and power device including the same

An LDO regulator includes a voltage-to-time converter configured to convert a fluctuation in an output voltage sensed from an output node into a time domain signal having a pulse type, and output the time domain signal, based on a clock signal; a time-to-voltage converter configured to receive the time domain signal, convert the time domain signal into a first voltage control signal performing first compensation for the output voltage, and output the first voltage control signal; an analog amplifier configured to output a second voltage control signal continuously performing second compensation for the output voltage, regardless of the clock signal; and a first pass transistor configured to drive the output voltage based on the second voltage control signal. The LDO regulator is configured to reduce the fluctuation in the output voltage, based on the first compensation and the second compensation.

Low-dropout regulator

A direct-current (DC)-DC converter includes a converting circuit including an inductor element. The converting circuit is configured to generate an output voltage from an input voltage based on a switching operation. An inductor current emulator is configured to adjust at least one parameter for changing a current peak value of the inductor element in response to a change in a level of the input voltage and is configured to generate an internal voltage based on the at least one parameter, which is adjusted. The inductor current emulator is configured to generate a control signal for controlling the switching operation such that current of the inductor element has a pattern corresponding to a pattern of the internal voltage.

DC-to-DC converter and integrated circuit including the same

An oscillation detector includes an amplitude variation detection circuit configured to generate a first pulse signal by comparing levels of voltages with each other, a frequency variation detection circuit configured to generate a second pulse signal by filtering the first pulse signal and allowing to pass a frequency component that is less than or equal to a certain frequency among frequency components of the first pulse signal, and a time variation detection circuit configured to output an oscillation detection signal when the second pulse signal has consecutive pulses for a period of time.

Oscillation detector and operating method thereof

An electronic device including: a reference voltage generator circuit to generate a reference voltage based on a first and second voltage, the reference voltage generator circuit including: a first current source to supply a first current to each of a first and second node; an amplifier to amplify a difference between the first voltage of the first node and the second voltage of the second node and to output a difference voltage corresponding to the amplified difference; a first bipolar junction transistor (BJT) connected to the first node; a first resistor connected to the second node; a second BJT connected between the first resistor and ground; a second resistor connected between the second node and ground; and a first transistor to be supplied with a second current from the first current source; and an adaptive cascode circuit to generate a bias voltage applied to a gate of the first transistor.

Electronic device

A low voltage attack detector includes: a low voltage detector configured to output a low voltage detection flag signal having a high level when a first power supply voltage reaches a first voltage level using a bandgap reference (BGR) circuit including a PMOS transistor and a first bipolar junction transistor (BJT) connected in series between the first power supply voltage and a second power supply voltage; a BGR operation region detector configured to output a malfunction detection flag signal having a high level when the first power supply voltage reaches a second voltage level lower than the first voltage level; and a logic gate configured to output a final low voltage detection flag signal having a high level when at least one of the low voltage detection flag signal and the malfunction detection flag signal has a high level.

Low voltage attack detector, secure element and electronic system including the same

A DC-DC converter including a switching buck regulator including a first power switch connected to a first power node, a second power switch connected to a second power node, a driver configured to drive the first and second power switches, an output filtering inductor connected to a node between the first and second power switches, and an output filtering capacitor connected to the output filtering inductor, a controller configured to compensate for an output signal of the switching buck regulator in a time domain using a reference voltage, and a feed forward circuit connected between the switching buck regulator and the controller, and including a first buffer, a second buffer, an RC filter, and an adder may be provided. Accordingly, the DC-DC converter can reduce a delay of a compensation circuit, improve transient response characteristics of the switching buck regulator, and further improve the performance of the DC-DC converter.

Voltage delay compensation in a buck converter

Provided is a driver assistance system including an internal camera installed in a vehicle to detect whether a driver is in a drowsy driving, and configured to photograph a state of eyes of the driver to acquire drowsiness data, a first sensor installed in the vehicle to have a front-side view of the vehicle, and configured to acquire first sensor data to detect an object in the front-side view, a second sensor installed in the vehicle to have a rear-side view of the vehicle and configured to acquire second sensor data to detect an object in the rear-side view, and a controller including at least one processor configured to process the drowsiness data, the first sensor data, and the second sensor data, wherein the controller is configured to: if a result of processing the drowsiness data is that the driver has closed the driver's eyes for a predetermined time or longer, transmit a control signal to at least one of a braking device or a steering device to perform a lane change for stopping the vehicle based on a result of processing the first sensor data and the second sensor data.

Growing community of inventors

Seongnam-si, South Korea

Junhyeok Yang