Samsung Electronics Co., Ltd.

Junhee Kim

Jooyoung Hwang

Jekyeom Jeon

Keunsan Park

Sunghyun Noh

Byungki Lee

Jinhwan Choi

Jeonguk Kang

Jeongwook Kim

Suk Jin Kim

Yeon Gon Cho

Sang Suk Lee

A processor configured to control a storage device includes at least one host write buffer generated based on device information of the storage device, and a control module configured to control the at least one host write buffer. The control module is further configured to store, in the at least one host write buffer, a plurality of write commands and merge the plurality of write commands to generate a merged write command.

Processor using host memory buffer and storage system including the processor

A storage system performing an overwrite, a host system controlling the storage system, and an operating method of the storage system, wherein the storage system includes a memory device; and a controller that receives new data and an overwrite request from the host system, wherein the overwrite request includes a first logical address for old data and a second logical address for the new data, and performs an overwrite operation by writing the new data corresponding to the second logical address to the memory device and invalidating the old data corresponding to the first logical address according to the overwrite request.

Storage system performing overwrite, host system controlling storage system, and operating method for storage system

A computing system includes a storage system configured to store data, and a host configured to compress a data block of a preset size loaded to a memory, generate a merged block of the preset size by merging a compressed block corresponding to the data block, an identifier of a node block referring the data block, and an offset indicating an index of the data block among at least one data block referred by the node block, and provide the merged block to the storage system.

Computing system including host and storage system and having increased write performance

A method of sharing a coarse grained array and a processor using the method is provided. A processor includes a first processor core including a plurality of first functional units which execute a first instruction set, a second processor core including a plurality of second functional units which execute a second instruction set, and a coarse grained array including a plurality of third functional units which execute a portion of instructions of the first instruction set and/or the second instruction set, instead of the first processor core and/or the second processor core.

Method of sharing coarse grained array and processor using the method

Growing community of inventors

Yongin-si, South Korea

Junhee Kim