Samsung Electronics Co., Ltd.

Hyundai Motor Company

Kia Corporation

JungWoo Seo

Yoosang Hwang

Hyun-Woo Chung

Sangyeon Han

Byoungdeog Choi

Hongrae Kim

Jonghyun Lee

Nam Hoon Lee

Gi-Nam Park

Joonsoo Park

Bokyung Jung

Kukhan Yoon

Jeongmin Lee

Cheolhong Kim

Jongyun Park

Dongseok Baek

KyoungRyul Yoon

Seokwoo Nam

Byung Joo Oh

Sunghyun Cho

Joonghan Shin

Yongjik Park

Kyoung Ryul Yoon

Leekwon Gil

Dongwon Jeoung

Sangmo Ha

A transmission control system of an electric vehicle includes a motor configured to generate drive torque; a transmission configured to perform multi-stage shifting using a dog clutch in a restraint relationship with a one-way clutch configured to transmit forward power of the motor; a speed sensor configured to measure a rotation speed on an output side of the transmission; a motor control unit configured to control the drive torque from the motor according to a driver's accelerator position signal (APS) value; and a vehicle control unit configured to control the multi-stage shifting of the transmission according to a torque command based on the APS value, and to perform clutch alignment control by moving up a sleeve in a reverse direction to contact a hub through a reverse rotation operation of gear teeth by applying reverse rotation torque of predetermined drive force through the motor in a pre-engagement state of the dog clutch.

Transmission control system and method for an electric vehicle

A semiconductor device includes a pair of line patterns disposed on a substrate. A contact plug is disposed between the pair of line patterns and an air gap is disposed between the contact plug and the line patterns. A landing pad extends from a top end of the contact plug to cover a first part of the air gap and an insulating layer is disposed on a second part of the air gap, which is not covered by the landing pad.

Methods of manufacturing semiconductor devices

A semiconductor device includes bit line structures on a substrate, the bit line structures extending along a first direction and being spaced apart from each other along a second direction perpendicular to the first direction, contact plugs spaced apart from each other along the first direction and being on active regions of the substrate between adjacent bit line structures, a linear spacer on each longitudinal sidewall of a bit line structure, landing pads on the contact plugs, respectively, the landing pads being electrically connected to the contact plugs, respectively, and landing pads that are adjacent to each other along the first direction being offset with respect to each other along the second direction, as viewed in a top view, a conductive pad between each of the contact plugs and a corresponding active region, a vertical axes of the conductive pad and corresponding active region being horizontally offset.

Semiconductor devices and methods of manufacturing the same

An apparatus for treating a substrate includes a chamber including a space in which a substrate is treated, a support member disposed in the chamber and supporting the substrate, and a heating member for heating the substrate. The space is divided into an upper space and a lower space by the support member. The support member includes a support plate receiving the substrate, a base supporting the support plate, exposing a bottom surface of the support plate and including a cut region formed in an edge portion of the base, and an adjustment block held in the cut region and coupled to the base. The cut region fluidly connects the upper space to the lower space. The adjustment block divides the cut region into a plurality of vents.

Apparatus for treating a substrate

Semiconductor devices having an air gap

A transparent plate and a substrate processing system including the same are disclosed. The substrate processing system may include a chamber, a lamp provided below the chamber, and a plate provided in the chamber to load a substrate. The plate may include a center region having a first transmittance value and an edge region having with a second transmittance value higher than the first transmittance value.

Transparent plate and substrate processing system therewith

A semiconductor device includes a substrate and a plurality of storage nodes on the substrate and extending in a vertical direction relative to the substrate. A lower support pattern is in contact with the storage nodes between a bottom and a top of the storage nodes, the lower support pattern spaced apart from the substrate in the vertical direction, and the lower support pattern having a first maximum thickness in the vertical direction. An upper support pattern is in contact with the storage nodes above the lower support pattern relative to the substrate, the upper support pattern spaced apart from the lower support pattern in the vertical direction, and the lower support pattern having a second maximum thickness in the vertical direction that is greater than the first maximum thickness of the lower support pattern.

Semiconductor devices and methods for fabricating the same

Disclosed are semiconductor devices and methods of forming the same. According to the semiconductor device, gate structures are provided to be buried in a substrate and first dopant regions and second dopant regions are provided at both ends of the gate structures. Conductive lines cross the gate structures and are connected to the first dopant regions. Contact structures are respectively provided in contact holes which are provided between the conductive lines and expose the second dopant regions. The contact structures are in contact with the second dopant regions, respectively. Each of the contact structures includes a pad pattern extending along a sidewall of the contact hole.

Semiconductor devices and methods fabricating same

A method of forming a semiconductor device includes first preliminary holes over an etch target, the first preliminary holes arranged as a plurality of rows in a first direction, forming dielectric patterns each filling one of the first preliminary holes, sequentially forming a barrier layer and a sacrificial layer on the dielectric patterns, forming etch control patterns between the dielectric patterns, forming second preliminary holes by etching the sacrificial layer, each of the second preliminary holes being in a region defined by at least three dielectric patterns adjacent to each other, and etching the etch target layer corresponding to positions of the first and second preliminary holes to form contact holes.

Methods of forming a semiconductor device

A method of forming a semiconductor memory device includes forming an etch target layer on a substrate, forming a sacrificial layer having preliminary openings on the etch target layer, forming assistance spacers in the preliminary openings, respectively, removing the sacrificial layer, such that the assistance spacers remain on the etch target layer, forming first mask spacers covering inner sidewalls of the assistance spacers, respectively, the first mask spacers respectively defining first openings, forming a second mask spacer covering outer sidewalls of the assistance spacers, the second mask spacer defining second openings between the first openings, the first and second openings being adjacent to each other along a first direction, and etching the etch target layer exposed by the first openings and the second openings to form holes in the etch target layer.

Method of forming a semiconductor memory device

Growing community of inventors

Hwaseong-si, South Korea

JungWoo Seo