Lg Electronics Inc.

Jungsig Jun

Jemin Woo

Jinjong Lee

Byoungjoo Lee

The present disclosure relates to an artificial intelligence chip for processing computations for machine learning models that provides a compute node and a method of processing a computational model using a plurality of compute nodes in parallel. In some embodiments, the compute node, comprises: a communication interface configured to communicate with one or more other compute nodes; a memory configured to store shared data that is shared with the one or more other compute nodes; and a processor configured to: determine an expected computational load for processing a computational model for input data; obtain a contributable computational load of the compute node and the one or more other compute nodes; and select a master node to distribute the determined expected computational load based on the obtained contributable computational load. Consequently, learning and inference can be performed efficiently on-device.

Processing computational models in parallel

An apparatus and method for determining co-channel interference in a DTV system is disclosed including a first comb filter filtering the received digital data including a data field signal; a pattern generating unit generating a reference sync signal from the data field signal; a second comb filter filtering the reference sync signal; a selection unit receiving either the digital data that passed or have not passed the first comb filter to output one of the data in response to a selection signal; a determination unit determining the presence of a co-channel interference; a first counting unit counting up/down a counted value in response to an output signal of the determination unit; and a second counting unit counting the reliability of the counted value output from the first counting unit, and providing the selection signal to the selection unit.

Growing community of inventors

Bucheon-si, South Korea

Jungsig Jun