Watchguard Technologies, Inc.

Exalt Wireless, Inc.

Exalt Communications Inc.

Jungji Yu

Peter Smidth

Yongmin Zhang

Fu-Kuang Frank Chao

Chih-Wei Chao

Fu-Kang Frank Chao

A multi-radio device system includes a set of sending radio devices and a set of receiving radio devices. Among the sending radio devices is a load-balancing radio device that receives data packets from an originating network. The load-balancing radio device labels data packets with sequence numbers and distributes the labeled data packets among the sending radio devices based on the relative capacities and statuses of those sending radio devices. The sending radio devices transmit the labeled data packets to the receiving radio devices. The receiving radio devices send the labeled data packets to an aggregating radio device within the set of receiving radio devices. The aggregating radio device uses the sequence numbers to ensure that the data packets are forwarded to a destination network in the correct order, extracting original data packets from the labeled data packets before forwarding the original data packets on toward the destination network.

Apparatus for Ethernet traffic aggregation of radio links

Apparatus for ethernet traffic aggregation of radio links

A system and method for scheduling packet output according to a quality of service (QoS) action specification. A system is provided with a calendar queue with a plurality of bandwidth timeslots, wherein the bandwidth timeslots are organized into groups. A look-up logic circuitry inspects a group of bandwidth timeslots substantially simultaneously and determines from the group a first unoccupied bandwidth timeslot in which a current packet can be scheduled. The look-up logic circuitry also determines a first occupied bandwidth timeslot that contains a next packet to be transmitted.

Software programmable calendar queue cache

A policy engine for handling incoming data packets. The policy engine includes a stream classification module, a data packet input/output module, and a policy enforcement module. The policy enforcement module further includes a packet scheduler, an on-chip packet buffer circuitry, and a plurality of action processors. The stream classification module creates a packet service header for each data packet, wherein the packet service header indicates policies to be enforced for that data packet. The action processors enforce the policies.

Policy engine architecture

A method of scheduling packet output according to a quality of service action specification, the method maintains a calendar queue of bandwidth timeslots, organizes the timeslots into groups, invokes a look-up logic circuitry to inspect a group of timeslots substantially simultaneously, determines a first unoccupied timeslot to schedule a current packet, and also determines a first occupied timeslot that contains a next packet to transmit.

Growing community of inventors

Saratoga, CA, United States of America

Jungji Yu