Samsung Electronics Co., Ltd.

Jung Yeop Yang

Hyuk Jae Jang

Sung Ho Jun

Yo Won Jeong

Byeung Woo Jeon

Tae Hwan Kim

Young-Beom Jung

Sung Ho Roh

Young Beom Jung

Hyung Ju Chun

Sung Hyun Cha

Ju Won Byun

Quoc Khanh Dinh

Seong Jin Kang

A system on chip includes: a codec encoding image frames; and a codec controller sending the image frames to the codec and allocating a buffer for encoding the image frames. The codec controller sends a first image frame to the codec. The codec controller allocates the first buffer to a memory and sends the first image frame to the codec. The codec encodes the first image frame and sends the encoded first image frame to the codec controller. The codec controller allocates the first buffer to the memory and sends a second image frame to the codec. The codec requests the codec controller to allocate a second buffer of a second size. The codec controller allocates the second buffer to the memory and sends the second image frame to the codec, and the codec encodes the second image frame and sends the encoded second image frame to the codec controller.

System on chip, method for operating thereof and video system

Provided are a stream reprocessing system on chip (SoC) and a method for operating the same is provided. The stream reprocessing system includes a plurality of processors including a central processing unit (CPU); a memory controller configured to receive a stream; and a stream reprocessor configured to perform reprocessing the stream, wherein the stream reprocessor includes: a control unit configured to determine whether to perform the reprocessing on the stream; a reprocessing unit configured to reprocess the stream based on receiving a command to perform the reprocessing on the stream from the control unit; and an output unit configured to transmit the reprocessed stream to a memory.

System and method for selectively reprocessing video streams based on system resources and stream status

A video encoding apparatus may include a partitioning unit which divides a frame included in input video into a plurality of blocks and a rate control module which adjusts a first quantization parameter value of a block corresponding to a region of interest among the plurality of blocks based on a first CBF (current buffer fullness) value of the region of interest, and adjusts a second quantization parameter value of a block corresponding to a non-region of interest among the plurality of blocks based on a second CBF value of the non-region of interest.

Video encoding apparatus

A video decoding apparatus, a computing system including the same, and a video decoding method. The video decoding apparatus may include an entropy decoder and a video decoder. The entropy decoder may be configured to obtain encoding information of a bitstream of an encoded video from a header of the bitstream, the encoding information of the bitstream including a bit depth of the bitstream, and convert a first quantization parameter of the bitstream into a second quantization parameter when the bit depth of the bitstream is different from a reference bit depth. The video decoder may be configured to decode the bitstream based on the second quantization parameter.

Video decoding apparatus, computing system including the same, and video decoding method

An encoding system includes a prediction mode decision unit and an encoding unit. The prediction mode decision unit is configured to receive a target image and decide an optimized mode by applying rate-distortion optimization (RDO) to n (n is a natural number) modes of the target image. The encoding unit is configured to encode the target image according to the decided mode. The prediction mode decision unit includes a distortion calculation unit configured to calculate distortion by mean squared error (MSE) calculation between the target image and the n modes, a Lagrangian multiplier calculation unit configured to calculate a Lagrangian multiplier based on multi-scale structural similarity (MS-SSIM) calculation, and a bitrate calculation unit configured to calculate a bit rate of the n modes.

Rate distortion optimization encoding system and method of operating the same

In an application processor having an encoder configured to reduce flicker occurring in a display, the encoder includes a transformer configured to generate first frequency domain coefficients for individual block values of a current frame, a quantizer configured to quantize the first frequency domain coefficients to generate quantized coefficients, and a coefficient calculator configured to generate first adjusting coefficients for reducing the flicker, where the quantizer is configured to adjust the quantization coefficients based on the first adjusting coefficients and output adjusted quantization coefficients.

Encoding device with flicker reduction

A data processing system includes a first core configured to decode a first picture and generate decoding history information of the decoded first picture, and a second core configured to modify first motion compensation information included in a second picture based on the decoding history information of the decoded first picture and decode the second picture based on the decoded first picture and the modified first motion compensation information.

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Seoul, South Korea

Jung Yeop Yang