United Microelectronics Corp.

Jung-Tsung Tseng

Chien-Ting Lin

Che-Hua Hsu

Yi-Wen Chen

Chien-Ming Lai

Cheng-Hsien Chou

Chih-Hao Yu

Li-Wei Cheng

Tian-Fu Chiang

Zhi-Cheng Lee

Cheng-Guo Chen

Po-Jui Liao

Jie-Ning Yang

Guang-Hwa Ma

Shao-Hua Hsu

Guang-Yaw Hwang

Tsung-Lung Tsai

Hung-Ling Shih

Teng-Chun Tsai

Yi-Wei Chen

Chun-Hsien Lin

Chan-Lon Yang

Chun-Yuan Wu

Jiunn-Hsiung Liao

Tony Lin

Chia-Lin Hsu

Hsin-Fu Huang

Wen-Han Hung

Min-Chuan Tsai

Po-Cheng Huang

Tong-Jyun Huang

Ying-Tsung Chen

Tzung-Ying Lee

Cheng-Yu Ma

Yoyi Gong

Abula Yu

A method of manufacturing a metal gate is provided. The method includes providing a substrate. Then, a gate dielectric layer is formed on the substrate. A multi-layered stack structure having a work function metal layer is formed on the gate dielectric layer. An Oambience treatment is performed on at least one layer of the multi-layered stack structure. A conductive layer is formed on the multi-layered stack structure.

Oxygen treatment of replacement work-function metals in CMOS transistor gates

The present invention provides a method of manufacturing semiconductor device having metal gates. First, a substrate is provided. A first conductive type transistor having a first sacrifice gate and a second conductive type transistor having a second sacrifice gate are disposed on the substrate. The first sacrifice gate is removed to form a first trench. Then, a first metal layer is formed in the first trench. The second sacrifice gate is removed to form a second trench. Next, a second metal layer is formed in the first trench and the second trench. Lastly, a third metal layer is formed on the second metal layer wherein the third metal layer is filled into the first trench and the second trench.

Method of manufacturing semiconductor device having metal gates

A method for fabricating metal gate transistor is disclosed. First, a substrate having a first transistor region and a second transistor region is provided. Next, a stacked film is formed on the substrate, in which the stacked film includes at least one high-k dielectric layer and a first metal layer. The stacked film is patterned to form a plurality of gates in the first transistor region and the second transistor region, a dielectric layer is formed on the gates, and a portion of the dielectric layer is planarized until reaching the top of each gates. The first metal layer is removed from the gate of the second transistor region, and a second metal layer is formed over the surface of the dielectric layer and each gate for forming a plurality of metal gates in the first transistor region and the second transistor region.

Metal gate transistor and method for fabricating the same

A method for fabricating a transistor having metal gate is disclosed. First, a substrate is provided, in which the substrate includes a first transistor region and a second transistor region. A plurality of dummy gates is formed on the substrate, and a dielectric layer is deposited on the dummy gate. The dummy gates are removed to form a plurality of openings in the dielectric layer. A high-k dielectric layer is formed to cover the surface of the dielectric layer and the opening, and a cap layer is formed on the high-k dielectric layer thereafter. The cap layer disposed in the second transistor region is removed, and a metal layer is deposited on the cap layer of the first transistor region and the high-k dielectric layer of the second transistor region. A conductive layer is formed to fill the openings of the first transistor region and the second transistor region.

A method for fabricating a transistor having a fully silicided gate is described. A silicon substrate with a semi-finished transistor formed thereon is provided, wherein the transistor comprises a gate dielectric film, a silicon gate, a cap layer on the silicon gate, a spacer and a source/drain region. A raised source/drain is formed on the source/drain region, and then the cap layer is removed. Subsequently, a full silicidation process is performed to fully silicide the silicon gate.

Method for fabricating transistor having fully silicided gate

Growing community of inventors

Tainan, Taiwan

Jung-Tsung Tseng