Electronics and Telecommunications Research Institute

Korea Telecommunication Authority

Other

Silicon Works Co., Ltd.

Hankook Tire Co., Ltd.

Jung Sik Kim

Bhum Cheol Lee

Jung Hak Kim

Ho Yong Ryu

Sung Back Hong

Pyung Koo Park

Jae Ho Lee

Do Yeon Kim

Dong Hyun Kim

Ju Pyo Hong

Byung Tae Jang

Sang Jin Hong

Seong Mo Moon

Ju Hyun Lee

Soon Seok Lee

Ho Sun Yoon

Chan Won Park

Ju Wan Kim

Hae Dong Kim

Jung Hee Lee

Sun Cheul Kim

Bheom Soon Joo

Young Soo Shin

Young Ho Park

Yoon Seok Nam

Seok Y Kang

Pyung-Koo Park

Sung Rae Cho

Seung Woo Hong

Sung Yeal Im

Soo Ile Park

Seung Jin Kim

Gwang Hun Gim

Jeongjin Roh

Won Sik Park

Geon Tae Park

Jae Seong Lee

Provided is a buck-boost converting circuit including an LED current regulator and bypass switches. The buck-boost converting circuit includes switches coupled in a matrix form in order to individually control a plurality of LEDs connected in series, an LED current regulator, and a circuit capable of buck-boost conversion.

Buck-boost converting circuit

Disclosed are a method and apparatus for load balancing by using multiple interfaces. The load balancing method using multiple interfaces and performed by the load balancing apparatus includes acquiring information about a plurality of wireless communication interfaces supported by a terminal, measuring transport qualities of the plurality of wireless communication interfaces, calculating data transfer rates of the plurality of wireless communication interfaces based on the transport qualities, and simultaneously transporting data based on the transfer rates through the plurality of wireless communication interfaces.

Method for load balancing using multiple interfaces and apparatus therefor

A home cloud gateway apparatus that is connected to an indoor home network and that provides a service to a client that connects through the network includes an Internet interface unit, a phone exchange unit, a storage unit that stores a virtual computer module, and an authentication processor. The home cloud gateway apparatus provides a virtual computer service by activating the virtualization module that is stored at the storage unit, and provides a phone call service through the Internet and a phone call service through the Internet and a phone network using the Internet interface unit and the phone exchange unit.

Home cloud gateway apparatus for multi-service and method of providing service using the same

Disclosed are a system for managing virtual private networks (VPNs) includes: terminals configured to transmit user data; a manager configured to transmit information for concealing networks and managing the VPNs; border gateways configured to decrypt the user data and perform a network address translation (NAT) procedure and a filtering procedure on the decrypted user data based on the information; and servers configured to receive the user data subjected to the NAT procedure and the filtering procedure, wherein the filtering procedure is a procedure discarding the user data to be transferred to the servers that are not allowed so as to allow the terminals to access only the allowed servers, the NAT procedure is a procedure changing an Internet protocol (IP) address used in a first network to an IP address used in a second network, and the first network and the second network are different networks.

System for managing virtual private network and method thereof

Provided is a data flow parallel processing apparatus and method. The data flow parallel processing apparatus may include a flow discriminating unit to discriminate a flow of input first data, a processor allocating unit to allocate, to the first data, a processor that is not operating among a plurality of processors, a sequence determining unit to determine a sequence number of the first data when a second data having the same flow as the discriminated flow is being processed by any one processor composing the plurality of processors, and an alignment unit to receive the first data processed by the allocated processor and to output the received first data based on the determined sequence number.

Apparatus and method for parallel processing data flow

An OFDM transmission apparatus having minimal transmission delay comprises a training symbol storage and generation unit, a delay unit and a controller. The training symbol storage and generation unit stores training symbols for the preamble, and outputs the stored training symbols when a training symbol output request signal is received. The delay unit receives data for the signal field from the MAC layer, delays the received data by the data processing time of the scrambler, and outputs the delayed data to the convolution encoder. The controller outputs the training symbol output request signal, requesting the preamble of the frame, to the training symbol storage and generation unit when a frame transmission request is received from the MAC layer, and outputs a data request signal, requesting the signal field and the data field, to the MAC layer in consideration of total data processing time (T).

OFDM transmission apparatus and method having minimal transmission delay

A MAC device guarantees QoS in a VoIP wireless LAN by giving higher priority to voice data than to non-voice data. Transmission data generated by an application program is provided to a modem according to the priority assigned to the data. A kernel classifies the transmission data into voice and non-voice data. A MAC driver stores the voice and non-voice data in two queues, and transmits a MAC header to a MAC transmitter to notify it of generation of the transmission data, and transmits the stored voice or non-voice data to the MAC transmitter according to the type of a transmission interrupt received from the MAC transmitter in response to the notification. The MAC transmitter combines the voice or non-voice data, received from the MAC driver in response to the transmission interrupt, with a corresponding header, and outputs it to the modem.

Media access control device guaranteeing communication quality in wireless LAN for VoIP

A method for quantitatively analyzing steer characteristics to acquire steering stability of vehicles/tires. The method divides the steer characteristics into understeer, oversteer, and power-off reaction characteristics, separately analyzes the understeer, oversteer, and power-off reaction characteristics, analyzes the understeer characteristic using a tuning curvature and a turning velocity characteristic in association with a vehicle turning path, analyzes the oversteer characteristic using a slope of a nose angle and a nose-angle time rate in association with a vehicle attitude, analyzes the power-off reaction characteristic using a nose-angle slope, a nose-angle change rate, and a nose-angle change amount, and compares the above-mentioned characteristics with reference data obtained from a Quasi steady-state condition test during which a vehicle driving state is stable, such that it can quantitatively determine the steer characteristics upon receipt of the result of the comparison.

Method for quantitatively analyzing steer characteristics to acquire steering stability of vehicles/tires

The user cell is received from the FRIA (Frame Relay Interface Apparatus) for thereby performing a connection identifier-based usage parameter control function, and the user cell which follows the permitted traffic and the IPC cell received from the FRIA through the IPC bus are multiplexed and synchronized to the module clock of the clock generator. The thusly synchronized user cell and IPC cell are transmitted to the ATM switch which is away by a few meters. The head data of the ATM cell received from the ATM switch is analyzed. In the case of the user cell, the frame relay interface apparatus identifier is analyzed, and the cell is transmitted to a corresponding FRIA in accordance with a corresponding virtual path identifier and virtual channel identifier value, and in the case of the IPC cell and OAM cell, the processor processes the cell using the AAL5 reassembling unit, so that it is possible to provide a cell transmission function between the frame relay interface apparatus and the ATM switching system.

ATM switch interface apparatus for frame relay network interworking

The present invention relates to a method of controlling a re-emission interval of an asynchronous transfer mode interval controller using a theoretical departure time. The present invention controls the generation of CDV in a controller of the current RDT similarly to the existing RDT method for controlling the intervals of ATM cells by processing the time which a cell is outputted from an interval controller as a theoretical departure time and registering by a little earlier time in CSQ compensating for the queuing delay of OQ, and solves the problem of the queuing delay accumulation in the existing RDT method.

Method for controlling a re-emission interval in an asynchronous

A system for supporting a fire fighting for a building and a fire fighting method using the same which are capable of more effectively performing a fire fighting operation by providing, in real time. The system includes a tracker for extracting a moving direction and speed of a fire fighter in a building, a see-through type HMD device for extracting a seeing direction of the fire fighter and providing a current position information of the fire fighter including a graphic and text information to the fire fighter, an externally connected PC for storing an information database corresponding to a structure of a building and information related thereto, tracing a position of the fire fighter in the building based on the moving direction of the fire fighter extracted by the tracker and the information database, judging an additional information with respect to a structure of the interior of the building and the structure which are seen by the fire fighter based on the seeing direction information of the fire fighter extracted by the see-through HMD device and the information database, and transmitting the same to the see-through HMD device, and a wireless data transmitting and receiving apparatus for communicating between the tracker, the see-through HMD device and the externally connected computer.

System for supporting fire fighting for building and fire fighting

A cyclic redundancy check synchronizer includes an N-byte shift register for shifting an input byte string by N bytes and N-1 bytes, a compensation polynomial driver for driving a compensation polynomial by modulo-2-dividing bits of a byte output from the Nth stage of the N-byte shift register by a generator polynomial and shifting the resultant remainder by one bit in a direction toward higher-order bits, and a calculator for inputting bits of an output byte from a remainder register as high-order bits and bits of an input data byte as low-order bits and for performing compensation polynomial modulo-2 subtraction and generator polynomial modulo-2 division for the inputted bits. The cyclic redundancy check synchronizer also includes a block synchronization identifier for searching for syndrome output signals from the calculator at an interval of a byte time to check whether the same syndrome signal is outputted from the calculator successively a predetermined number of times or more at an interval of a block period, and a data selector for selecting bits constituting a byte from among output bits from the N-byte shift register according to a certain one of the syndrome output signals from the calculator resulting in a block synchronous state in response to a data selection signal from the block synchronization identifier to output byte-synchronized data.

Cyclic redundancy check synchronizer

This invention relates to an apparatus for retiming digital data transmitted at a high speed even though the phase of a binary data bit is not related to the phase of the static offset of a retiming clock pulse, the apparatus comprising: local clock pulse generation means 11 for generating and outputting local clock pulse FT; delayed clock pulse parallel generation means 12 for outputting, in parallel, n delayed clock pulses delayed sequentially by one cycle of local clock pulse FT; input data transition detection means 13 for outputting pulse DT each time the rising and falling carrier waves intersect in input data D; sequential logic parallel phase detection means 14 for providing clock pulse selection data by outputting sequential logic phases of the upper location of the pulse generated during input data transition and transition location of n delayed clock pulses; retiming clock pulse selection means 15 for outputting a retiming clock pulse according to the clock pulse selection data of the input delayed clock pulses; time delay compensation means 16 for outputting delayed input data; and data retiming means 17 for outputting the data retimed DR according to the retiming clock pulse.

Apparatus for retiming digital data transmitted at a high speed

Growing community of inventors

Daejeon, South Korea

Jung Sik Kim