Hynix Semiconductor Inc.

Jung-Seock Lee

Ky-Hyun Han

Ki-Won Nam

A semiconductor device includes a hard mask including a first layer and a second layer in contact with each other and having opposite stress types, wherein a difference between initial stresses of the first layer and the second layer is increased so that after a thermal process, the difference between the final stresses of the first and second layer becomes smaller, to reduce the likelihood of peeling of the first or second layer. The initial stress of the first layer includes a compressive stress and the initial stress of the second layer includes a tensile stress.

Semiconductor device having multiple-layer hard mask with opposite stresses and method for fabricating the same

A method for forming a semiconductor device includes forming an etch target layer, forming a sacrificial hard mask layer having a metal layer and a carbon-based material layer on the etch target layer, forming a photoresist pattern on the carbon-based material layer, etching the carbon-based material layer by the photoresist pattern until a remaining carbon-based material portion has a predetermined thickness, etching the remaining carbon-based material portion until a corresponding metal layer portion is exposed to form a carbon-based material pattern, and etching the metal layer by using the carbon-based material pattern to form a hard mask pattern for forming the pattern.

Method for forming pattern in semiconductor device

A method for forming a contact in a semiconductor device includes opening a contact hole exposing a surface of a substrate, performing a first post treatment to form a rough portion at a bottom surface of the contact hole, and performing a second post treatment. The first post treatment includes using a fluorocarbon gas and the second post treatment includes using a nitrogen trifluoride (NF) gas.

Method for forming a roughened contact in a semiconductor device

A method for fabricating a semiconductor device includes forming a mask pattern over a substrate; etching a certain portion of the substrate using the mask pattern as an etch mask to form a first recess having sidewalls; forming a polymer-based layer over the sidewalls of the first recess and a top surface of the mask pattern; etching the substrate beneath the first recess using the mask pattern and the polymer-based layer as an etch mask to form a second recess wider and more rounded than the first recess, the second recess and the first recess constituting a bulb-shaped recess; and forming a gate pattern over the bulb-shaped recess.

Method for fabricating semiconductor device with recess gate

A method for fabricating a semiconductor device having a recess gate includes forming a hard mask pattern on a substrate, etching the substrate using the hard mask pattern as an etch barrier to form a recess pattern, forming a passivation layer protecting surfaces of the recess pattern, etching a bottom surface of the recess pattern while protecting sidewalls of the recess pattern, performing an isotropic etching process onto a bottom portion of the recess pattern, and forming a gate pattern partially buried into the recess pattern after the isotropic etching process is performed.

Growing community of inventors

Kyoungki-do, South Korea

Jung-Seock Lee