Samsung Electronics Co., Ltd.

Jung-min Lee

Se-Chung Oh

Ju-hyun Kim

Jung-hwan Park

Dong-kyu Lee

Kyung-il Hong

A variable resistance memory device includes a metal interconnection layer on a substrate, an interlayer insulating layer on the metal interconnection layer and defining a contact hole for exposing a portion of the metal interconnection layer, a barrier metal layer including a plurality of sub-barrier metal layers inside the contact hole, a plug metal layer on the barrier metal layer and burying the contact hole, and a variable resistance structure on the barrier metal layer and the plug metal layer.

Variable resistance memory device

In a method of manufacturing a variable resistance memory device, an MTJ structure layer is formed on a substrate. The MTJ structure layer is etched in an etching chamber to form an MTJ structure. The substrate having the MTJ structure thereon is transferred to a deposition chamber through a transfer chamber. A protection layer covering a sidewall of the MTJ structure is formed in the deposition chamber. The etching chamber, the transfer chamber, and the deposition chamber are kept in a high vacuum state equal to or more than about 10Torr.

Growing community of inventors

Gwangmyeong-si, South Korea

Jung-min Lee