Taiwan Semiconductor Manufacturing Comp. Ltd.

Jung-Kuo Tu

Bruce C S Chou

Ching-Kai Shen

Yi-Chuan Teng

Wei-Chu Lin

Hung-Wei Liang

Dun-Nian Yaung

Jen-Cheng Liu

Szu-Ying Chen

Cheng-Chieh Hsieh

Tzu-Jui Wang

Kuo-Chin Huang

Xin-Hua Huang

Chia-Shiung Tsai

Chen-Jong Wang

Ping-Yin Liu

Lan-Lin Chao

Xiaomeng Chen

Chen-Chih Fan

Tsung-Te Chou

Yi-chuan Teng

Chun-Ren Cheng

Hsun-Chung Kuang

Shih-Wei Lin

Yi-Hsien Chang

Chih-Hsien Lin

Jui-Chun Weng

Hsi-Cheng Hsu

Chen-Hua Lin

Hsiang-Tai Lu

Chih-Yu Wang

Shyh-Wei Cheng

Wei-Cheng Shen

Mingo Liu

Che-Jung Chu

Tzu-Heng Wu

Yu-Ting Hsu

Tung-Hung Hsieh

Victor Chiang Liang

Wen-Chuan Tai

Hsiang-Fu Chen

Fan Hu

Li-Chun Peng

Xin-Chung Kuang

Bruce Cs Chou

The present disclosure relates to an integrated chip including a semiconductor device substrate and a plurality of semiconductor devices arranged along the semiconductor device substrate. A micro-electromechanical system (MEMS) layer overlies the semiconductor device substrate. The MEMS layer includes a first moveable mass and a second moveable mass. A capping layer overlies the MEMS layer. The capping layer has a first lower surface directly over the first moveable mass and a second lower surface directly over the second moveable mass. An outgas layer is on the first lower surface and directly between the first pair of sidewalls. A lower surface of the outgas layer delimits a first cavity in which the first moveable mass is arranged. The second lower surface of the capping layer delimits a second cavity in which the second moveable mass is arranged.

Micro-electromechanical systems (MEMS) device with outgas layer

The present disclosure provides a method for fabricating a semiconductor structure, including bonding a capping substrate over a sensing substrate, forming a through hole traversing the capping substrate, forming a dielectric layer over the capping substrate under a first vacuum level, and forming a metal layer over the dielectric layer under a second vacuum level, wherein the second vacuum level is higher than the first vacuum level.

Micro electro mechanical system (MEMs) device having metal sealing on necking portion of vent hole

A method for forming a semiconductor device includes receiving a first bonded to a second substrate by a dielectric layer, wherein a conductive layer is disposed in the dielectric layer and a cavity is formed between the first substrate, the second substrate and the dielectric layer; forming a via opening in the second substrate to expose the conductive layer and a vent hole in the substrate to couple to the cavity; forming a first buffer layer covering sidewalls of the via opening and a second buffer layer covering sidewalls of the vent hole; and forming a connecting structure in the via opening and a sealing structure to seal the vent hole.

Method for manufacturing semiconductor device

A semiconductor structure includes a substrate, a MEMS substrate, a dielectric structure between the substrate and the MEMS substrate, a cavity in the dielectric structure, an electrode over the substrate, and a protrusion disposed in the cavity. The MEMS substrate includes a movable membrane, and the cavity is sealed by the movable membrane. A height of the protrusion is less than a depth of the cavity.

Semiconductor structure and method for forming the same

A microelectromechanical system device includes a substrate, a dielectric layer, an electrode, a surface modification layer and a membrane. The dielectric layer is formed on the substrate, and is formed with a cavity that is defined by a cavity-defining wall. The electrode is formed in the dielectric layer. The surface modification layer covers the cavity-defining wall, and has a plurality of hydrophobic end groups. The membrane is connected to the dielectric layer, and seals the cavity. The membrane is movable toward or away from the electrode. A method for making a microelectromechanical system device is also provided.

MEMS device and method for making the same

A semiconductor structure is provided. The semiconductor structure includes a first substrate, a semiconductor layer, a second substrate, and a eutectic sealing structure. The semiconductor layer is over the first substrate. The semiconductor layer has a cavity at least partially through the semiconductor layer. The second substrate is over the semiconductor layer. The second substrate has a through hole. The eutectic sealing structure is on the second substrate and covers the through hole. The eutectic sealing structure comprises a first metal layer and a second metal layer eutectically bonded on the first metal layer. A method for manufacturing a semiconductor structure is also provided.

Semiconductor structure and method for manufacturing thereof

Method of forming dielectric and metal sealing layers on capping structure of a MEMs device

A MEMS device and a method for manufacturing a MEMS device are provided. The MEMS device includes an anchor, a diaphragm structure, and a sealing film. The diaphragm structure is disposed over the anchor and has an opening through the diaphragm structure. The sealing film covers at least a portion of the opening of the diaphragm structure.

MEMS device and manufacturing method thereof

A semiconductor device includes a first substrate; a dielectric layer disposed over the first substrate and a conductive layer disposed in the dielectric layer; a second substrate bonded to the dielectric layer, wherein the second substrate has a first surface facing the first substrate and a second surface opposite to the first substrate; a connecting structure penetrating the second substrate and a portion of the dielectric layer and electrically coupled to the conductive layer; a vent hole penetrating the second substrate from the second surface to the first surface; a first buffer layer between the connecting structure and the dielectric layer and between the connecting structure and the second substrate; and a second buffer layer covering sidewalls of the vent hole and exposed through the first surface of the second substrate. The first buffer layer and the second buffer layer include a same material and a same thickness.

Layer for buffer semiconductor device including microelectromechnical system (MEMS) device

A semiconductor device includes a first integrated circuit and a second integrated circuit. The first integrated circuit includes a semiconductor substrate and a dielectric layer disposed on a top surface of the semiconductor substrate. The second integrated circuit is disposed on the dielectric layer of the first integrated circuit and includes a dummy opening extending through the second integrated circuit and having a metal layer covering the inner walls of the dummy opening and in contact with the dielectric layer, wherein the metal layer is electrically grounded or electrically floating.

Semiconductor device and manufacturing method of semiconductor device

A method includes forming a recess in a first substrate, bonding a micro-electro-mechanical systems (MEMS) substrate to the first substrate after forming the recess in the first substrate, forming an anti-stiction layer over the micro-electro-mechanical systems (MEMS) substrate, pattering the anti-stiction layer, etching the MEMS substrate to form a MEMS device, and bonding the MEMS device and the first substrate to a second substrate. The patterned anti-stiction layer is between the MEMS device and the second substrate.

Method of fabricating semiconductor structure

The present disclosure provides a semiconductor structure, including a sensing substrate, a capping substrate over the sensing substrate, the capping substrate having a first surface facing toward the sensing substrate and a second surface facing away from the sensing substrate, wherein the capping substrate comprises a through hole extending from the first surface to the second surface, a spacer between the sensing substrate and the capping substrate, the spacer, the sensing substrate, and the capping substrate forming a cavity connecting with the through hole, and a sealing structure at the second surface and aligning with the through hole, wherein the sealing structure comprises a metal layer and a dielectric layer.

Semiconductor structure and manufacturing method for the same

A system and method for blocking heat from reaching an image sensor in a three dimensional stack with a semiconductor device. In an embodiment a heat sink is formed in a back end of line process either on the semiconductor device or else on the image sensor itself when the image sensor is in a backside illuminated configuration. The heat sink may be a grid in either a single layer or in two layers, a zig-zag pattern, or in an interleaved fingers configuration.

Image sensor device and method

A substrate structure for a micro electro mechanical system (MEMS) device, a semiconductor structure and a method for fabricating the same are provided. In various embodiments, the substrate structure for the MEMS device includes a substrate, the MEMS device, and an anti-stiction layer. The MEMS device is over the substrate. The anti-stiction layer is on a surface of the MEMS device, and includes amorphous carbon, polytetrafluoroethene, hafnium oxide, tantalum oxide, zirconium oxide, or a combination thereof.

Substrate structure, semiconductor structure and method for fabricating the same

A semiconductor device includes a first die having a first active surface and a first backside surface opposite the first active surface, a second die having a second active surface and a second backside surface opposite the second active surface, and an interposer, the first active surface of the first die being electrically coupled to a first side of the interposer, the second active surface of the second die being electrically coupled to a second side of the interposer. The semiconductor device also includes a first connector over the interposer, a first encapsulating material surrounding the second die, the first encapsulating material having a first surface over the interposer, and a via electrically coupling the first connector and the interposer. A first end of the via is substantially coplanar with the first surface of the first encapsulating material.

Package structure and methods of forming same

Growing community of inventors

Hsin-Chu, Taiwan

Jung-Kuo Tu