Samsung Electronics Co., Ltd.

Coway Co., Ltd

Jung-Hwan Oh

Ki-Hyun Hwang

Byung-Lyul Park

Young-wook Park

Hyeon-Deok Lee

Jae-Young Park

Hong-Seong Son

In-Seak Hwang

Kyung-young Kim

Won-sik Shin

Hyo-jung Kim

Bum-keun Kim

Sang-Chun Byun

Young-sun Kim

Han-jin Lim

Beom-seok Lee

Chang-Hoon Lee

Ki-Vin Im

Seok-Woo Nam

Beom-jun Jin

Kong-Soo Lee

Eun-ae Chung

Young-sub You

U-in Chung

Ki-hyun Hwang

Hyun-jun Kim

Yong-Woo Hyung

Jong-Bom Seo

Hee-Seok Kim

Seok-woo Nam

Go-Un Lee

Dae-Han Yoo

Disclosed are a water storage tank and a method for controlling the full water level thereof. The water storage tank according to one embodiment of the present invention comprises: a tank main body for storing water which flows in through a water inlet and discharging water through an outlet; and a control unit for controlling inflow and outflow of water into and from the tank main body, wherein the control unit can change the height of the full water level of the tank main body according to a user's selection or the degree of water discharge from the tank main body.

Water storage tank and method for controlling full water level thereof

A method and apparatus using an on-screen keyboard as an input unit. A method of using an on-screen keyboard as an input unit comprises receiving information on a first key that is selected through the input unit that has fewer input keys than the on-screen keyboard, highlighting a predetermined key in a predetermined group of keys including a number key on the on-screen keyboard that corresponds to the first key, and moving a highlighted portion on the on-screen keyboard when a second key is selected through the input unit.

Method and apparatus using on-screen keyboard as input unit

Provided are a semiconductor device and a fabricating method thereof. The semiconductor device includes a storage electrode having a cylinder shape, a dielectric film formed on the storage electrode, and a plate electrode formed on the dielectric film, wherein the plate electrode includes a first semiconductor compound layer and a second semiconductor compound layer sequentially stacked one on the other, and the first semiconductor compound layer has a crystallinity different from that of the second semiconductor compound layer.

Semiconductor device and fabricating method thereof

A computer system, including a data storage unit which stores first operating system data of the computer system therein; a main memory to which the first operating system data is copied; a data transmission unit which transmits data between the data storage unit and the main memory; and a controller which performs a power-on self test (POST) of the computer system, and controls the data transmission unit to copy the first operating system data stored in the data storage unit to the main memory during the POST.

Computer system and booting method thereof

A contact structure includes a lower conductive pattern disposed on a predetermined region of a semiconductor substrate. The lower conductive layer has a concave region at a predetermined region of a top surface thereof. An embedding conductive layer fills the concave region. The top surface of the embedding conductive layer is placed at least as high as the height of the flat top surface of the lower conductive pattern. A mold layer is disposed to cover the semiconductor substrate, the lower conductive pattern and the embedding conductive layer. An upper conductive pattern is arranged in an intaglio pattern. The intaglio pattern is disposed in the mold layer to expose a predetermined region of the embedding conductive layer.

Contact structure of semiconductor devices and method of fabricating the same

A memory test device, including a universal register to conduct an operation by a predetermined universal command language; an extension register having a larger capacity than the universal register and to conduct an operation by a predetermined extension command language; and a controller to write a predetermined test pattern in an external memory using the extension command language, to read the test pattern written in the memory, to determine the identity of the written test pattern and the read test pattern, and to determine a presence of an error in the memory using the universal command language.

Memory test device and memory test method

A recessed gate electrode structure includes a first recess and a second recess in communication with the first recess both formed in a substrate. The second recess is larger than the first recess. A gate dielectric layer is formed on a top surface of the substrate and on an inner surface of the first and second recesses. A first polysilicon layer fills the first recess and is doped with impurities at a first impurity density. A second polysilicon layer fills the second recess and is doped with the impurities at a second impurity density. A void is defined within the second polysilicon layer. A third polysilicon layer is formed on the gate dielectric and first polysilicon layers and is doped with the impurities at a third impurity density. Due to impurities in the second polysilicon layer, migration of the void within the second recess may be substantially prevented.

Recessed gate electrode and method of forming the same and semiconductor device having the recessed gate electrode and method of manufacturing the same

A capacitor of a semiconductor device includes a cylinder type capacitor lower electrode, a dielectric layer, and an upper electrode. The upper electrode includes a metallic layer on the dielectric layer and a doped polySiGelayer stacked on the metallic layer. Methods of forming these capacitors also are provided.

Methods of forming capacitors of semiconductor devices including silicon-germanium and metallic electrodes

In a method of forming an oxide layer, ozone is generated by reacting an oxygen gas having a first flow rate with a nitrogen gas having a second flow rate of more than about 1% of the first flow rate. A reactant including the ozone and nitrogen is provided onto a silicon substrate. A surface of the silicon substrate is oxidized via the reaction of the reactant with silicon in the silicon substrate. The flow rate of the nitrogen gas is increased while ozone serving as an oxidant is formed by reacting the nitrogen gas with the oxygen gas. Thus, the oxide layer or a metal oxide layer including nitrogen may be rapidly formed on the substrate.

Method of oxidizing a silicon substrate and method of forming an oxide layer using the same

An etch stop layer is formed over a surface of an interlayer insulating layer and over a surface of a conductive plug extending at a depth from the surface of the interlayer insulating layer. A lower mold layer is deposited over the etch stop layer, and a wet etch rate of the lower mold layer is adjusted by adding dopants to the lower mold layer during formation of the lower mold layer, and by annealing the lower mold layer. An upper mold layer is then deposited over the surface of the lower mold layer, such that a wet etch rate of the upper mold layer is less than the adjusted wet etch rate of the lower mold layer. The upper mold layer, the lower mold layer and the etch stop layer are then subjected to dry etching to form an opening therein which exposes at least a portion of the surface of the contact plug. Then a wet etching of the upper mold layer and the lower mold layer is performed so as to increase a size of the opening at the lower mold layer and so at to expose a surface portion of the etch stop layer adjacent the surface of the conductive plug. A conductive material is then deposited over the surface of the opening in the upper and lower mold layers to define a capacitor electrode.

One-cylinder stack capacitor and method for fabricating the same

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Suwon-si, South Korea

Jung-Hwan Oh