Samsung Electronics Co., Ltd.

Jung Hun Heo

Taek Kyun Shin

Jae Gon Lee

Jun Ho Seo

Dong Keun Kim

Si Young Kim

Sun Cheol Kwon

Jin Su Park

Young Duk Kim

Jinpyo Park

Gilles Dubost

Soong Hyun Shin

Sang Wook Ju

Seung Chull Suh

An application processor and a system on chip (SoC) that incorporates the application processor are provided. The application processor includes a first core configured to process first data per unit time, a second core configured to process second data larger than the first data per unit time, and a lookup table configured to determine whether to activate the first core or the second core based on at least one of an analysis result of a message signal received by a communications processor, a sensing signal supplied to the application processor and a power level supplied to the communications processor.

Application processor that performs core switching based on modem data and a system on chip (SOC) that incorporates the application processor

Application processor that performs core switching based on modem data and a system on chip (SoC) that incorporates the application processor

A low-power synchronizer circuit, a data processing circuit that incorporates the synchronizer circuit, and a synchronization method are provided. The synchronizer circuit includes a delay circuit for receiving and delaying an asynchronous input signal, a first flip-flop having an input terminal connected to an output terminal of the delay circuit, a clock terminal for receiving the asynchronous input signal, and a reset terminal for receiving the asynchronous input signal, a synchronizer connected to an output terminal of the first flip-flop, and a clock-gating circuit for receiving a clock signal and determining whether to supply the clock signal to the synchronizer in response to one of a first output value of the delay circuit and a second output value of the first flip-flop and a third output value of the synchronizer.

Low-power clock-gated synchronizer, a data processing system that incorporates the same and a synchronization method

An application processor includes a central processing unit (CPU), intellectual properties (IPs), a hardware power management unit (PMU) configured to determine whether the application processor is in system idle based on a first idle signal output from the CPU and output control signals as a result of the determination, and a clock signal supply control circuit configured to change an output signal supplied to the CPU and the IPs from clock signals to an oscillation clock signal, based on the control signals. The oscillation clock signal has a frequency lower than that of the clock signals.

Application processor for adjusting clock signal using hardware power management unit and devices including the same

A system-on-chip includes a clock controller configured to decrease an operating frequency of at least one function block based on a change in an operating state of the at least one function block from an active state to an idle state. In a method of operating a system-on-chip including at least one function block, an operating frequency of the at least one function block is decreased based on a change in an operating state of the at least one function block from an active state to an idle state. The decreased operating frequency is greater than zero.

Methods of controlling clocks in system on chip including function blocks, systems on chips and semiconductor systems including the same

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Suwon-si, South Korea

Jung Hun Heo