Taiwan Semiconductor Manufacturing Comp. Ltd.

Sky Tech Inc.

Other

Qdlux Inc.

Jung-Hua Chang

Cheng-Lin Huang

Jing-Cheng Lin

Ling-Wei Li

Chin-Fu Kao

Szu-Wei Lu

Ying-Ching Shih

Jy-Jie Gau

Jian-Yang He

Po-Hao Tsai

Jui-Pin Hung

Nai-Wei Liu

Chia-Cheng Ku

Chih-Wei Wu

Ta-Hao Kuo

Mao-chan Chang

Chen-Yang Huang

Mao-Chan Chang

Ching-Liang Yi

A package structure is provided. The package structure includes a conductive structure having a first portion with a first sidewall and a second portion with a second sidewall, and the first sidewall and the second sidewall have different slopes. The package structure also includes a semiconductor chip beside the conductive structure and a protective layer laterally surrounding the conductive structure and the semiconductor chip. The protective layer covers the first sidewall of the first portion and the second sidewall of the second portion. The protective layer is made of a polymer material dispersed with fillers.

Package structure with through vias

A package structure includes a first semiconductor die having a first conductive pad and a second semiconductor die having a second conductive pad. The package structure also includes a conductive structure and a third semiconductor die. The third semiconductor die extends across a portions of the first semiconductor die and the second semiconductor die. A third conductive pad and a fourth conductive pad of the third semiconductor die are aligned with the first conductive pad and the second conductive pad, respectively. The package structure further includes a protective layer surrounding the conductive structure and the third semiconductor die and an insulating layer extending across an interface between the protective layer and the conductive structure. The package structure includes a conductive layer electrically connected to the conductive structure. The conductive layer has a first portion spaced from the conductive structure and a second portion directly above the conductive structure.

Package structure with fan-out feature

A semiconductor structure including an integrated circuit die and conductive bumps is provided. The integrated circuit die includes bump pads. The conductive bumps are disposed on the bump pads. Each of the conductive bumps includes a first pillar portion disposed on one of the bump pads and a second pillar portion disposed on the first pillar portion. The second pillar portion is electrically connected to one of the bump pads through the first pillar portion, wherein a first width of the first pillar portion is greater than a second width of the second pillar portion. A package structure including the above-mentioned semiconductor structure is also provided.

Package structure including stacked pillar portions and method for fabricating the same

A method includes forming a metal bump on a top surface of a first package component, forming a solder region on a top surface of the metal bump, forming a protection layer extending on a sidewall of the metal bump, reflowing the solder region to bond the first package component to a second package component, and dispensing an underfill between the first package component and the second package component. The underfill is in contact with the protection layer.

Metal-bump sidewall protection

A manufacturing method of an optical device includes: providing a lower transparent substrate; wherein the lower transparent substrate includes an upper surface; providing a quantum dot film element and a glue-material enclosure wall disposed on the upper surface; wherein the glue-material enclosure wall surrounds the quantum dot film element; providing an upper transparent substrate covering the quantum dot film element and the glue-material enclosure wall, such that the quantum dot film element and the glue-material enclosure wall are sandwiched between the lower transparent substrate and the upper transparent substrate; and cutting the lower transparent substrate and the upper transparent substrate to form a lower protective film and an upper protective film corresponding to the quantum dot film element, so as to obtain the optical device including the lower protective film, the upper protective film, the quantum dot film element, and the glue-material enclosure wall.

Manufacturing method of optical device, optical device with quantum dots, and illumination apparatus with quantum dots

A chip package structure is provided. The chip package structure includes a first substrate. The chip package structure includes a conductive via structure passing through the first substrate. The chip package structure includes a barrier layer over a surface of the first substrate. The chip package structure includes an insulating layer over the barrier layer. The chip package structure includes a conductive pad over the insulating layer. The conductive pad has a first portion passing through the insulating layer and the barrier layer and connected to the conductive via structure. The chip package structure includes a conductive bump over the conductive pad. The chip package structure includes a second substrate. The chip package structure includes an underfill layer between the first substrate and the second substrate.

Chip package structure

A parallelism-adjustable bonding machine includes a first chamber, a second chamber, a press-bonding unit, a carrier and plural parallelism-adjusting units. The first chamber is configured to connect to the second chamber, so as to define a closed space therebetween. The press-bonding unit is disposed within the first chamber, and the carrier is disposed within the second chamber. The press-bonding unit is disposed to face the carrier configured to press and bond substrates placed on the carrier. Each of the parallelism-adjusting units is disposed on the first chamber, and includes an adjustment shaft extending through the first chamber and connected to the press-bonding unit. The adjustment shaft includes an adjustment member located outside the first chamber and the closed space. A user is able to adjust a parallelism between the press-bonding unit and the carrier in an efficient and precise manner, from the adjustment member.

Parallelism-adjustable bonding machine

Package structure including stacked pillar portions

A package structure is provided. The package structure includes a conductive structure having a first portion and a second portion, and the second portion is wider than the first portion. The package structure also includes a semiconductor chip laterally separated from the conductive structure. The package structure further includes a protective layer laterally surrounding the conductive structure and the semiconductor chip. The first portion of the conductive structure has a sidewall extending from the second portion to a surface of the protective layer. The protective layer laterally surrounds an entirety of the sidewall of the first portion.

A chip package structure is provided. The chip package structure includes a first substrate. The chip package structure includes a conductive via structure passing through the first substrate. The chip package structure includes a barrier layer over a surface of the first substrate. The chip package structure includes an insulating layer over the barrier layer. The chip package structure includes a conductive pad over the insulating layer and having a first portion and a second portion. The chip package structure includes a conductive bump over the second portion of the conductive pad. A third portion of the conductive pad is between the conductive bump and the conductive via structure from a top view of the conductive pad, the conductive bump, and the conductive via structure.

A package structure and a formation method of a package structure are provided. The method includes forming a conductive structure over a carrier substrate and disposing a semiconductor die over the carrier substrate. The method also includes forming a protective layer to surround the conductive structure and the semiconductor die. The method further includes forming an insulating layer over the protective layer. The insulating layer has an opening exposing a portion of the conductive structure. In addition, the method includes forming a conductive layer over the insulating layer. The conductive layer fills the opening, and the conductive layer has a substantially planar top surface.

Structure and formation method of chip package with fan-out feature

The present disclosure provides a quantum dot particle with passivation layer, which mainly includes a one quantum dot (QD) particle, a first-passivation layer and a second-passivation layer, wherein the first-passivation layer is disposed on a surface of the QD particle, and the second-passivation layer is disposed on a surface of the first-passivation layer. A precursor chosen for forming the first-passivation layer does not cause damage to the QD particle. A precursor of the second-passivation layer includes a composition of trimethylaluminum (TMA) and water, or TMA and ozone, wherein a density of the second-passivation layer is greater than that of the first-passivation layer. The precursor of the second-passivation layer is kept out by the first-passivation layer, such that to prevent the precursor of the second-passivation layer from contacting the QD particle and causing deterioration thereto, and hence to improve a life cycle of the QD particle.

Quantum dot particles with passivation layer and manufacturing method thereof

A detachable atomic layer deposition apparatus for powders is disclosed, which includes a vacuum chamber, a shaft sealing device, and a driving unit. The driving unit is connected to the shaft sealing device. The vacuum chamber is fixed to one end of the shaft sealing device via at least one fixing member. The driving unit drives the vacuum chamber to rotate via the shaft sealing device to agitate the powders in a reaction space of the vacuum chamber to facilitate the formation of thin films with uniform thickness on the surface of the powders. In addition, the vacuum chamber can be removed from the shaft sealing device for users to take out the powders from the vacuum chamber and clean the vacuum chamber, thereby improving the convenience in usage.

Detachable atomic layer deposition apparatus for powders

An atomic layer deposition apparatus for coating particles is disclosed. The atomic layer deposition apparatus includes a vacuum chamber, a shaft sealing device, and a driving unit. The driving unit is connected to and drives the vacuum chamber to rotate through the shaft sealing device. The vacuum chamber includes a reaction space for accommodating a plurality of particles, wherein the reaction space has a polygonal columnar shape or a wavy circular columnar shape. An air extraction line and an air intake line are fluidly connected to the vacuum chamber, and the air intake line is used to transport a precursor gas and a non-reactive gas to the reaction space. Through the special shape of the reaction space together with the non-reactive gas, the particles in the reaction space can be effectively stirred to form a thin film with a uniform thickness on the surface of each particle.

Atomic layer deposition apparatus for coating on fine powders

The present disclosure is an alignment mechanism of a bonding machine, in particular an alignment mechanism of a wafer bonding machine, which mainly has a support pedestal, at least three first alignment pins, and at least three second alignment pins, a first cam and a second cam. When the first cam rotates relative to the support pedestal, it will drive the first alignment pin to move relative to the support pedestal to position the first substrate on the support pedestal. When the second cam rotates relative to the support pedestal, it drives the second alignment pin to move relative to the support pedestal to position the second substrate above the first substrate, so that the second substrate is aligned with the first substrate to facilitate bonding the first substrate and the second substrate.

Growing community of inventors

Hsinchu, Taiwan

Jung-Hua Chang