Samsung Electronics Co., Ltd.

Jung-han Lee

Sang-Su Kim

Jae-Hwan Lee

Tae-Jong Lee

Seung-mo Ha

Hwan-Wook Choi

Seung-hun Lee

Jeong-yun Lee

Hyun-jung Lee

Sun-ghil Lee

Myung-il Kang

Sun-wook Kim

A semiconductor device includes a plurality of active fins defined by an isolation layer on a substrate, a gate structure on the active fins and the isolation layer, and a gate spacer structure covering a sidewall of the gate structure. A sidewall of the gate structure includes first, second, and third regions having first, second, and third slopes, respectively. The second slope increases from a bottom toward a top of the second region. The second slope has a value at the bottom of the second region less than the first slope. The third slope is greater than the second slope.

Semiconductor devices

An integrated circuit (IC) device includes a first and a second fin-type active region protruding from a first region and a second region, respectively, of a substrate, a first and a second gate line, and a first and a second source/drain region. The first fin-type active region has a first top surface and a first recess has a first depth from the first top surface. The first source/drain region fills the first recess and has a first width. The second fin-type active region has a second top surface and a second recess has a second depth from the second top surface. The second depth is greater than the first depth. The second source/drain region fills the second recess and has a second width. The second width is greater than the first width.

Integrated circuit device and method of manufacturing the same

FinFET semiconductor device with a dummy gate, first gate spacer and second gate spacer

Semiconductor devices and methods of manufacturing the same

Growing community of inventors

Anyang-si, South Korea

Jung-han Lee