Samsung Electronics Co., Ltd.

Jung-Hak Song

Hyun-Min Choi

Chanho Lee

Hyunsu Choi

Hyun-Su Choi

Jungmin Choi

In-Gyu Park

Pan-jong Kim

A semiconductor memory device includes a memory cell array that includes memory cells arranged in rows and columns, a row decoder that is configured to receive a row address, decode the row address, and adjust voltages of selection lines based on the decoded row address, a word line driver that is connected with the selection lines, is connected with the rows of the memory cells through word lines, and is configured to adjust voltages of the word lines in response to an internal clock signal and the voltages of the selection lines, and a detection circuit that is connected with the word lines and is configured to activate a detection signal in response to voltages of the word lines being identical at a specific timing.

Semiconductor memory devices

An e-fuse test device is provided. The e-fuse test device may include a first transistor, and a fuse array connected to a source/drain terminal of the first transistor. The fuse array may include n fuse groups, each of the fuse groups may include one end, the other end, and m first fuse elements connected in series to each other between the one end and the other end, the one end of each of the fuse groups may be connected to each other, and the other end of each of the fuse groups may be connected to the source/drain terminal of the first transistor, and the n and m are natural numbers that are equal to or larger than two.

E-fuse test device and semiconductor device including the same

Semiconductor devices include a plurality of fuses and a plurality of program circuits, respective ones of which are configured to program respective ones of the plurality of fuses. The devices further include a shift register configured to activate at least two of the program circuits. In some embodiments, the shift register includes a first shift register configured to generate first select signals and a second shift register configured to generate second select signals corresponding to data to be programmed to the plurality of fuses. Respective ones of the program circuits may be configured to program respective ones of the fuses responsive to respective pairs of the first select signals and the second select signals.

Semiconductor devices supporting multiple fuse programming modes

A driver may include a driving unit and/or a boosting unit. The driving unit may be configured to provide a driving signal to at least one load. The boosting unit may be configured to boost the driving signal based on transition time points of the driving signal to reduce a distortion of the driving signal. The transition time points may be time points during a transition of the driving signal from a first level to a second level.

Growing community of inventors

Seoul, South Korea

Jung-Hak Song