Taiwan Semiconductor Manufacturing Comp. Ltd.

Kang Na Hsiung Enterprise Co., Ltd.

Jung-Chi Tai

Chii-Horng Li

Yen-Ru Lee

Heng-Wen Ting

Chien-I Kuo

Li-Li Su

Lilly Su

Chien-Chang Su

Che-Hui Lee

Ying-Wei Li

Yang-Tai Hsiao

Ho-Hsi Yang

Chien-Chung Su

Pei-Ren Jeng

Tzu-Ching Lin

Yan-Ting Lin

Chih-Yun Chin

Yee-Chia Yeo

Ming-Hua Yu

Tsz-Mei Kwok

Yi-Fang Pai

Jeng-Wei Yu

Tsung-Hsi Yang

Cheng-Hsiung Yen

Jui-Hsuan Chen

Chun-Meng Huang

Lung-Chieh Lin

Chien-Hsiang Lin

Fei-Yi Hung

Fei-yi Hung

A device includes a first semiconductor fin, a second semiconductor fin, a source/drain epitaxial structure, a semiconductive cap, and a contact. The first semiconductor fin and the second semiconductor fin are over a substrate. The source/drain epitaxial structure is connected to the first semiconductor fin and the second semiconductor fin. The source/drain epitaxial structure includes a first protruding portion and a second protruding portion aligned with the first semiconductor fin and the second semiconductor fin, respectively. The semiconductive cap is on and in contact with the first protruding portion and the second protruding portion. A top surface of the semiconductive cap is lower than a top surface of the first protruding portion of the source/drain epitaxial structure. The contact is electrically connected to the source/drain epitaxial structure and covers the semiconductive cap.

Semiconductor Fin-like field-effect transistor (FinFET) device including source/drain structure with boron doped capping layer

An embodiment is a structure including a first fin over a substrate, a second fin over the substrate, the second fin being adjacent the first fin, an isolation region surrounding the first fin and the second fin, a gate structure along sidewalls and over upper surfaces of the first fin and the second fin, the gate structure defining channel regions in the first fin and the second fin, a source/drain region on the first fin and the second fin adjacent the gate structure, and an air gap separating the source/drain region from a top surface of the substrate.

FETs and methods of forming FETs

A method includes forming a gate stack on a first portion of a semiconductor fin, removing a second portion of the semiconductor fin to form a recess, and forming a source/drain region starting from the recess. The formation of the source/drain region includes performing a first epitaxy process to grow a first semiconductor layer, wherein the first semiconductor layer has straight-and-vertical edges, and performing a second epitaxy process to grow a second semiconductor layer on the first semiconductor layer. The first semiconductor layer and the second semiconductor layer are of a same conductivity type.

Epitaxy regions with large landing areas for contact plugs

Semiconductor device

The present invention relates to a secondary battery structure having a windable flexible polymer matrix solid electrolyte and a manufacturing method thereof. The manufacturing method comprises the steps of electroplating a positive electrode on a first side of a cloth solid electrolyte; then electroplating a negative electrode on a second side opposite to the first side of the cloth solid electrolyte; and conducting a heat treatment process to form a first carbonized layer between the positive electrode and the cloth solid electrolyte, and a second carbonized layer between the negative electrode and the cloth solid electrolyte.

Secondary battery structure having windable flexible polymer matrix solid electrolyte and manufacturing method thereof

An embodiment is a semiconductor structure. The semiconductor structure includes a fin on a substrate. A gate structure is over the fin. A source/drain is in the fin proximate the gate structure. The source/drain includes a bottom layer, a supportive layer over the bottom layer, and a top layer over the supportive layer. The supportive layer has a different property than the bottom layer and the top layer, such as a different material, a different natural lattice constant, a different dopant concentration, and/or a different alloy percent content.

Supportive layer in source/drains of FinFET devices

FETS and methods of forming FETS

A method includes etching a semiconductor substrate to form a plurality of semiconductor fins. The semiconductor fins are etched to form a recess. An epitaxy structure is grown in the recess. The epitaxy structure has a W-shape cross section. A capping layer is formed over the epitaxy structure. The capping layer is at least conformal to a sidewall of the epitaxy structure. The capping layer is etched to expose a top surface of the epitaxy structure. A first portion of the capping layer remains over the sidewall of the epitaxy structure after etching the capping layer. A contact is formed in contact with the exposed top surface of the epitaxy structure and the first portion of the capping layer.

Method for fabricating semiconductor device

A method includes forming a crown structure over a substrate; forming fins in the crown structure; forming an intra-device isolation region between the fins and forming inter-device isolation regions on opposing sides of the crown structure; forming a gate structure over the fins; forming a dielectric layer that extends continuously over the inter-device isolation regions, the fins and the intra-device isolation region; performing an etching process to reduce a thickness of the dielectric layer, where after the etching process, upper surfaces of the inter-device isolation regions and upper surfaces of the fins are exposed while an upper surface of the intra-device isolation region is covered by a remaining portion of the dielectric layer; and forming an epitaxial structure over the exposed upper surfaces of the fins, where after the epitaxial structure is formed, there is a void between the epitaxial structure and the intra-device isolation region.

Semiconductor device and manufacturing method thereof

A semiconductor device includes a plurality of semiconductor fins, an epitaxy structure, a capping layer, and a contact. The epitaxy structure adjoins the semiconductor fins. The epitaxy structure has a plurality of protrusive portions. The capping layer is over a sidewall of the epitaxy structure. The contact is in contact with the epitaxy structure and the capping layer. The contact has a portion between the protrusive portions. The portion of the contact between the protrusive portions has a bottom in contact with the epitaxy structure.

Semiconductor device and method for fabricating the same

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Tainan, Taiwan

Jung-Chi Tai