University of Electronic Science and Technology of China

Emc IP Holding Company LLC

Junfeng Wu

Xiaorong Luo

Bo Zhang

Yang Zhang

Hao Wang

Jiang Tan

Tao Sun

Fu Peng

Chao Yang

Jie Wei

Qing Liu

Linhua Huang

Weiwei Ge

Da Ma

Mengshan Lv

Jiayun Xiong

Techniques involve managing a storage system. Along these lines, for each of a plurality of snapshots, a plurality of blocks referenced by the snapshot is determined. An evaluation score indicating an impact that deletion of the snapshot has on space release and data retention is determined based on at least one of: a reference count for the plurality of blocks, a size of a storage resource associated with the snapshot, and the number of blocks of the plurality of blocks that are referenced only once. At least one snapshot to be deleted is selected from the plurality of snapshots based on respective evaluation scores of the plurality of snapshots.

Method, device, and computer readable storage medium for managing storage system

A tri-gate laterally-diffused metal oxide semiconductor (LDMOS), including a substrate, a P-type semiconductor region, a P-type contact region, an N-type source region, a gate dielectric layer, an N-type drift region, a first isolation dielectric layer, an N-type drain region, and a second isolation dielectric layer. The P-type semiconductor region is disposed on one end of an upper surface of the substrate, and the N-type drift region is disposed on another end of the upper surface. The P-type semiconductor region contacts with the N-type drift region. The P-type contact region and the N-type source region are disposed on one side of the P-type semiconductor region which is away from the N-type drift region, and compared with the P-type contact region, the N-type source region is in the vicinity of the N-type drift region.

Kind of power tri-gate LDMOS

An enhancement mode HEMT, including: a substrate layer; a buffer layer; barrier layers; drain electrodes; reverse polarization semiconductor layers; source electrodes; an insulated gate dielectric; and a metal gate electrode The buffer layer is disposed on the substrate layer, and the barrier layers are disposed on the buffer layer. Interfaces between the buffer layer and the barrier layers are provided with first heterojunctions having a two-dimensional electron gas (2DEG) channel. The drain electrodes are disposed at one end of the upper surfaces of the barrier layers and form Ohmic contact with the barrier layers. The reverse polarization semiconductor layers are disposed on the upper surfaces of the barrier layers and are able to produce inversed polarization with the barrier layers. The interfaces between reverse polarization semiconductor layers and barrier layers are provided with second heterojunctions having two-dimensional hole gas (2DHG).

Enhancement mode high electron mobility transistor

Growing community of inventors

Chengdu, China

Junfeng Wu