Chinese Academy of Sciences

Boe Technology Group Co., Ltd.

Tsinghua University

Tusimple, Inc.

Hefei Boe Display Technology Co., Ltd.

Junfeng Li

Chao Zhao

Tao Yang

Jiang Yan

Guilei Wang

Jinbiao Liu

Chunlong Li

Dapeng Chen

Jun Luo

Wenwu Wang

Xiaobin He

Huicai Zhong

Huaxiang Yin

Junjie Li

Jinjuan Xiang

Yu Wang

Jianfeng Gao

Jing Min Xu

Nan Wu

Bo Li

Hui Li

Xinyu Liu

Ke Wei Wei

Ping Chen

Hao Yu

Hong Yang

Song Wu

Chen Tang

Shi Xia Liu

Yan Cui

Tianchun Ye

Xiaolei Wang

Yao M Wang

Qinghua Yang

Qingzhu Zhang

Qiang Xu

Meiyin Yang

Lingkuan Meng

Xinhua Wang

Guodong Wu

Hewei Wang

Sen Huang

Pingping Lu

Shuai Ji

Sumei Wang

Haitao Hu

Shuli Zhao

Lichuan Zhao

Henry H Radamson

YongHua Cai

Yanru Li

Mingming Mu

Jianlong Wang

Fugai Chen

Hushan Cui

Xiongkun Yang

Guanglu Chen

Yihong Lu

Zhenzhen Kong

The present disclosure discloses a method for suppressing the azimuth ambiguity of multi-channel SAR systems based on channel cancellation, which falls within the field of radar signal processing. The method includes: imaging echoed of the multi-channel SAR system based on a linear mapping reconstruction algorithm to obtain a reconstructed high-resolution wide-swath image; estimating positions of the azimuth ambiguity regions of the reconstructed high-resolution wide-swath image; extracting ambiguity images in the azimuth ambiguity regions based on channel cancellation and the refocusing algorithm; and suppressing a repetitive ambiguity image in imaging the echo of the multi-channel SAR system. The method weakens the influence of the original image on azimuth ambiguity extraction, improves the performance of ambiguity suppression, and solves the problem of additional repetitive ambiguity in multi-channel SAR systems by reconstructing the ambiguity signal, and improves the image quality of the multi-channel SAR system, which has great value for subsequent applications such as SAR image interpretation.

Method for suppressing azimuth ambiguity of multi-channel SAR systems based on channel cancellation

A semiconductor device and a method for manufacturing the semiconductor device. Multiple stacks and an isolation structure among the multiple stacks are formed on a substrate. Each stack includes a first doping layer, a channel layer and a second doping layer. For each stack, the channel layer is laterally etched from at least one sidewall of said stack to form a cavity located between the first doping layer and the second doping layer, and a gate dielectric layer and a gate layer are formed in the cavity. A first sidewall of each stack is contact with the isolation structure, and the at least one sidewall does not include the first side wall. Costly high-precision etching is not necessary, and therefore a device with a small size and a high performance can be achieved with a simple process and a low cost. Diversified device structures can be provided on requirement.

Semiconductor device and method for manufacturing the same

The present disclosure relates to a liquid crystal panel and a repairing method thereof, and a display device. The liquid crystal panel includes an array substrate and a filter substrate, and the repairing method includes: irradiating a pixel which is a bright spot of the liquid crystal panel with laser from one side of the array substrate away from the filter substrate, so that a portion of the array substrate located in the pixel is converted from a light transmitting area into a light shielding area.

Liquid crystal panel and repairing method using a laser thereof, and display device

The present disclosure provides an emergency braking system, an emergency braking method and a semitrailer, capable of improving the braking effect of the vehicle, thereby achieving improved safety for the vehicle. The system includes: a sensor component configured to collect sensed information on an environment where a semitrailer is located; and a braking controller configured to determine whether there is a risk of collision for the semitrailer based on the sensed information, and if so, calculate a maximum adhesive force that can be provided by a road surface the semitrailer is currently on, determine a first braking pressure corresponding to each wheel based on the maximum adhesive force and axle load information, and transmit to a braking system a first braking instruction carrying the first braking pressure for each wheel.

Emergency braking system, emergency braking method and semitrailer

A multi-state memory and a method for manufacturing the same. A magnetoresistive tunnel junction is disposed on a spin-orbit coupling layer, and thermal annealing is performed after dopant ions are injected from a side of the magnetoresistive tunnel junction. The concentration of dopant ions in the magnetoresistive tunnel junction has a gradient variation along the direction that is perpendicular to the direction of the current and within the plane in which the spin-orbit coupling layer is located. Symmetry along the direction perpendicular to the direction of the current is broken. In a case a current flows into the spin-orbit coupling layer, resistance are outputted in multiple states in linearity with the current. The multi-state storage is achieved. It can meet a requirement on hardware of neural network synapses, and is applicable to calculation in a neural network.

Multi-state memory and method for manufacturing the same

A method and an apparatus for processing radioactive wastewater are provided, wherein the radioactive wastewater is processed by using Disc Tube Reverse Osmosis (DTRO) membrane assembly, thereby achieving both the effects of high decontamination factors and high concentration multiples. In said method, the radioactive wastewater passes through the first-stage membrane assembly and the second-stage membrane assembly in sequence to obtain the second-stage clear water, and the first-stage concentrated water flowing out of the first-stage membrane assembly enters the third-stage membrane assembly to obtain concentrate.

Method and apparatus for processing radioactive wastewater

The present disclosure provides a method for manufacturing a transistor having a gate with a variable work function, comprising: providing a semiconductor substrate; forming a dummy gate stack on the semiconductor substrate and performing ion implantation on an exposed area of the semiconductor substrate at both sides of the dummy gate stack to form source/drain regions; removing the dummy gate and annealing the source/drain regions; providing an atomic layer deposition reaction device; introducing a precursor source reactant into the atomic layer deposition reaction device; and controlling an environmental factor for the atomic layer deposition device to grow a work function metal layer. The present disclosure also provides a transistor having a gate with a variable work function. The present disclosure may adjust a variable work function, and may use the same material system to obtain an adjustable threshold voltage within an adjustable range.

Transistor having a gate with a variable work function and method for manufacturing the same

A method for manufacturing a low interface state device includes performing a remote plasma surface process on a III-Nitride layer on a substrate; transferring the processed substrate to a deposition cavity via an oxygen-free transferring system; and depositing on the processed substrate in the deposition cavity. The deposition may be low pressure chemical vapor deposition (LPCVD). The interface state between a surface dielectric and III-Nitride material may be significantly decreased by integrating a low impairment remote plasma surface process and LPCVD.

Low interface state device and method for manufacturing the same

A method for monolithic integration of a hyperspectral image sensor is provided, which includes: forming a bottom reflecting layer on a surface of the photosensitive region of a CMOS image sensor wafer; forming a transparent cavity layer composed of N step structures on the bottom reflecting layer through area selective atomic layer deposition processes, where N=2, m&#x2265;1 and m is a positive integer; and forming a top reflecting layer on the transparent cavity layer. With the method, non-uniformity accumulation due to etching processes in conventional technology is minimized, and the cavity layer can be made of materials which cannot be etched. Mosaic cavity layers having such repeated structures with different heights can be formed by extending one-dimensional ASALD, such as extending in another dimension and forming repeated regions, which can be applied to snapshot hyperspectral image sensors, for example, pixels, and greatly improving performance thereof.

Method of monolithic integration of hyperspectral image sensor

A method for manufacturing a semiconductor device, comprising: forming a gate trench on a substrate; forming a gate dielectric layer and a metal gate layer thereon in the gate trench; forming a first tungsten (W) layer on a surface of the metal gate layer, and forming a tungsten nitride (WN) blocking layer by injecting nitrogen (N) ions; and filling with W through an atomic layer deposition (ALD) process. The blocking layer prevents ions in the precursors from aggregating on an interface and penetrating into the metal gate layer and the gate dielectric layer. At the same time, adhesion of W is enhanced, a process window of W during planarization is increased, reliability of the device is improved and the gate resistance is further reduced.

Method for manufacturing semiconductor device

A method for forming a metal silicide. The method comprises: providing a substrate having a fin, a gate formed on the fin, and spacers formed on opposite sides of the gate; depositing a Ti metal layer; siliconizing the Ti metal layer; and removing unreacted Ti metal layer. As the Ti atoms have relatively stable characteristics, diffusion happens mostly to Si atoms while the Ti atoms rarely diffuse during the thermal annealing. As a result, current leakage can be prevented in a depletion region and thus leakage current of the substrate can be reduced.

Methods for forming metal silicide

The invention discloses a novel dry etching method, which comprises the following steps: forming a to-be-etched layer on a semiconductor substrate; forming a masking material on the to-be-etched layer; carrying out dry etching on the masking material and the to-be-etched layer; simultaneously carrying out lateral etching (parallel to the surface of the substrate) of a masking layer and longitudinal etching (vertical to the surface of the substrate) of the to-be-etched layer; and obtaining the inclination angle (the included angle between a slope surface and the surface of the substrate) of the corresponding etched slope surface by accurately controlling the speed ratio. The method can flexibly adjust the inclination angle of the etched slope surface within a large range (0-90 degrees), and especially has advantages in the field of the application with a small inclination angle (smaller than 20 degrees) of the etched slope surface in comparison with a conventional etching method.

Etching method

There is provided a method for manufacturing a semiconductor device, including: providing a semiconductor substrate having a plurality of openings formed thereon by removing a sacrificial gate; filling the openings with a top metal layer having compressive stress; and performing amorphous doping with respect to the top metal layer in a PMOS device region. Thus, it is possible to effectively improve carrier mobility of an NMOS device, and also to reduce the compressive stress in the PMOS device region to ensure a desired performance of the PMOS device.

A method for manufacturing a FinFET device, including providing a substrate; implementing a source/drain doping on the substrate; etching the doped substrate to form a source region and a drain region; forming a fin channel between the source region and the drain region; and forming a gate on the Fin channel. The fin and the gate are formed after the source/drain doping is implemented on the substrate, so that the source/drain doping is done as a doping for a planar device, which ensures the quality of the source/drain coping and improves the property of the FinFET device.

Method for manufacturing a FinFET device

A method of depositing a tungsten (W) layer is disclosed. In one aspect, the method includes depositing a SiHbase W film on a surface of a substrate to preprocess the surface. The method includes depositing a BHbase W layer on the preprocessed surface. The SiHbase W film may be several atom layers thick. The film and base W layer may be deposited in a single ALD process, include reactive gas soak, reactive gas introduction, and main deposition operations. Forming the film may include introducing SiHgas into a reactive cavity during the gas soak operation, and introducing SiHand WFgas into the cavity during the gas introduction operation. The SiHand WFgases may be alternately introduced, for a number of cycles depending on the thickness of the tungsten layer to be deposited.

Method of depositing tungsten layer with improved adhesion and filling behavior

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Beijing, China

Junfeng Li