Gan Systems Inc.

Gan Svstems Inc.

Juncheng Lu

Larry Spaziani

Di Chen

Ruoyu Hou

Peter Anthony Di Maso

A power stage assembly for improved thermal dissipation and EMC for top-cooled semiconductor power switching devices, e.g. high voltage, high current lateral GaN power transistors in embedded die packages. The power switching devices are mounted on a PCB substrate, with electrical connections between a bottom side of each device package and the PCB. Each device package has a thermal pad on the top-side. A heat-spreader is secured in thermal contact with the thermal pads of each device, and a heatsink is in thermal contact with the heat-spreader. The heat-spreader is a multilayer structure comprising: a thermally conductive metal substrate layer in contact with the heatsink; a conductive layer providing an EMC layer which is connected to power ground; a conductive layer defining large area thermal pads in thermal contact with thermal pads of each die; and dielectric material electrically isolating conductive layers of the heat-spreader.

Thermal management solution for power stage comprising top-cooled power semiconductor switching devices

An active gate voltage control circuit for a gate driver of a power semiconductor switching device comprising a power semiconductor transistor, such as a GaN HEMT, provides active gate voltage control comprising current burst mode operation and protection mode operation. The gate-source turn-on voltage Vis increased in burst mode operation, to allow for a temporary increase of saturation current. In protection mode operation, a multi-stage turn-off may be implemented, comprising reducing Vto implement fast soft turn-off, followed by full turn-off to bring Vbelow threshold voltage, to reduce switching transients such as Vspikes. Circuits of example embodiments provide for burst mode operation for enhanced saturation current, to increase robustness of enhancement mode GaN power switching devices, e.g. under overcurrent and short circuit conditions, or to provide active gate voltage control which adjusts dynamically to specific operating conditions or events.

Active gate voltage control circuit for burst mode and protection mode operation of power switching transistors

Low inductance power modules for ultra-fast wide-bandgap semiconductor power switching devices are disclosed. Conductive tracks define power buses for a switching topology, e.g. comprising GaN E-HEMTs, with power terminals extending from the power buses through the housing to provide a heatsink-to-busbar distance which meets creepage and clearance requirements. Low-profile, low-inductance terminals for gate and source-sense connections extend from contact areas located adjacent each power switching device to provide for a low inductance gate drive loop, for high di/dt switching. The gate driver board is mounted on the low-profile terminals, inside or outside of the housing, with decoupling capacitors provided on the driver board. For paralleled switches, additional terminals, which are referred to as dynamic performance pins, are provided to the power buses. These pins are configured to provide a low inductance path for high-frequency current and balance inductances of the power commutation loops for each switch.

Power modules for ultra-fast wide-bandgap power switching devices

Hybrid power switching stages and driver circuits are disclosed. An example semiconductor power switching device comprises a high-side switch and a low-side switch connected in a half-bridge configuration, wherein the high-side switch comprises a GaN power transistor and the low-side switch comprises a Si MOSFET. The Si&#x2014;GaN hybrid switching stage provides enhanced performance, e.g. reduced switching losses, in a cost-effective solution which takes advantage of characteristics of power switching devices comprising both GaN power transistors and Si MOSFETs. Also disclosed is a gate driver for the Si&#x2014;GaN hybrid switching stage, and a semiconductor power switching stage comprising the gate driver and a Si&#x2014;GaN hybrid power switching device having a half-bridge or full-bridge switching topology.

Hybrid power stage and gate driver circuit

A 3-level T-type neutral point clamped (NPC) inverter/rectifier is disclosed in which neutral point clamping is dynamically enabled/disabled responsive to load, e.g. enabled at low load for operation in a first mode as a 3-level inverter/rectifier and disabled at high/peak load for operation in a second mode as a 2-level inverter/rectifier. When the neutral clamping leg is enabled only under low load and low current, middle switches Sand Scan be smaller, lower cost devices with a lower current rating. Si, SiC, GaN and hybrid implementations provide options to optimize efficiency for specific load ratios and applications. For reduced switching losses and enhanced performance of inverters based on Si-IGBT power switches, a hybrid implementation of the dual-mode T-type NPC inverter is proposed, wherein switches Sand Scomprise Si-IGBTs and switches Sand Sof the neutral clamping leg comprise GaN HEMTs. Applications include electric vehicle traction inverters.

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Kanata, Canada

Juncheng Lu