No. 24 Research Institute of China Electronics Technology Group Corporation

China Electronic Technology Corporation, 24th Research Institute

Jun Yuan

Ting Li

Yong Zhang

Dongbing Fu

Guangbing Chen

Jian'an Wang

Ruzhang Li

Gangyi Hu

Yan Wang

Yabo Ni

Guang-Bing Chen

Gang-Yi Hu

Zhengbo Huang

Yu-Xin Wang

Dong-Bing Fu

Xingfa Huang

Jian-An Wang

Ru-Zhang Li

Zicheng Xu

Zheng-Bo Huang

The present disclosure provides a buffer circuit and a buffer. The buffer circuit includes: an input follower circuit for following the voltage change of the first input signal; an input follower linearity boosting circuit for improving follower linearity of the input follower circuit; a first voltage bootstrap circuit for bootstrapping the voltage of the first input signal; a second voltage bootstrap circuit for bootstrapping the voltage of the second input signal; a third voltage bootstrap circuit for providing corresponding quiescent operation point voltage; a compensation follower circuit for following the compensation voltage; a compensation follower linearity boosting circuit for improving follower linearity of the compensation follower circuit; a first load for collecting the buffered voltage; a bias circuit for providing a bias current for the buffer; a bias linearity boosting circuit for improving linearity of the bias circuit; a second load for generating a nonlinear compensation current.

Buffer circuit and buffer

A sampling device includes a switch capacitor circuit. First ends of two switches are respectively connected to an input signal. Second end of the first switch is connected to an upper plate of a first capacitor. Second end of the second switch is connected to a lower plate of a second capacitor. A connection node connecting a lower plate of the first capacitor to an upper plate of the second capacitor is connected to a power source. The first ends of a third switch and a fourth switch are respectively connected to an input common-mode voltage. A second end of the third switch is connected to the upper plate of the first capacitor. A second end of the fourth switch is connected to the lower plate of the second capacitor. The connection node is connected to the power source. Thus, an output common-mode voltage of the sampling device is adjustable.

Sampling device

Growing community of inventors

Chongqing, China

Jun Yuan