Korea University Research and Business Foundation

Samsung Electronics Co., Ltd.

Electronics and Telecommunications Research Institute

Samsung Electro-Mechanics Co., Ltd.

Sk Telecom Company, Ltd.

Pohang University of Science and Technology Foundation

Neurobiogen Co., Ltd.

Megabiowood Co., Ltd

Jun Young Heo

Byung Kyu Ahn

Sung Sik Yoon

Jong-Hyun Park

Jong Hyun Lee

Tae Hyun Kim

Dong Jin Kim

Ae Nim Pae

Ji Won Choi

Yun Kyung Kim

ChangJoon Justin Lee

Ki Duk Park

Yong Koo Kang

Seul Ki Yeon

Sun Joon Min

Hyun Ah Choo

Myeong-Woo Lee

Hyo Jung Song

Min Ho Nam

Bo Ko Jang

Eun Ji Ju

Jong-Hyun Baik

Seon Mi Jo

Kwangseok Noh

In-Seok Hwang

Jae Young Lee

Jin-Sung Kim

Chul Gyun Park

Sung Hoon Lee

Deock-Gil Oh

Ho-Jin Lee

Inkyu Lee

Chung-Gu Kang

Kwonjong Lee

Sung Won Kim

Sung-Woo Park

Pan-Soo Kim

Joun Sup Park

Sung-Won Kim

Byungkyu Ahn

Yun-Jeong Song

Young Lak Kim

Jonghyun Lee

Byoung-Hak Kim

Jeonghoon Park

Won Jin Lee

Il Kwon Sohn

Jin Hyo Park

Jun-Young Wi

Sung-sik Yoon

YoungKil Suh

Chong Joon You

Joong-Gon Ryoo

Jong Hyun Baik

In Duk Han

Jeong Hwan Shin

Young-Kil Suh

Sang Chul Ha

Jong-hyun Park

Kyoung-Hoon Kwon

Jinyoung Ha

Young Kil Suh

Yujin Kang

Disclosed is a method for a logical CNOT operation of quantum logical qubits, which is performed by a quantum computing device, which may include: arranging a plurality of logical data qubits in a first column which is a horizontal column; arranging a plurality of logical ancilla qubits corresponding to the plurality of logical data qubits, respectively as a second column which is a horizontal column different from the first column to correspond to the plurality of logical data qubits, respectively; and performing logical controlled NOT (CNOT) for a first logical data qubit and a second logical data qubit among the plurality of logical data qubits.

Method for logical CNOT operation of quantum logical qubits

The present disclosure relates to a quantum error correction code and, more particularly, to a method and apparatus for optimizing a quantum error correction code in biased error environment. The method for optimizing a quantum error correction code, according to an embodiment of the present disclosure, may comprise the steps of: estimating, on the basis of a physical error rate (p) and a bias degree (η), a logical error rate (P) for each of one or more candidate lattice sizes; determining, on the basis of the estimated logical error rate (P) and a target logical error rate (P), an optimal lattice size from among the one or more candidate lattice sizes; and arranging a Qubit on the basis of the optimal lattice size. Here, when the bias degree (η) exceeds 1, the one or more candidate lattice sizes may be defined in the form of a rectangular excluding a square.

Method and apparatus for optimizing bias error-based quantum error correction code

A method of detecting a signal in a wireless communication system supporting multiple-input multiple-output (MIMO) is provided. The method includes obtaining a MIMO channel matrix between a transmission end and a reception end and a reception vector received by the reception end, identifying a modulation scheme of the transmission end, applying a preset equation modification scheme to the MIMO channel matrix and the reception vector according to the identified modulation scheme, and detecting a transmission vector of the transmission end by performing quantum calculation on the modified MIMO channel matrix and the modified reception vector.

Method and apparatus for detecting signal with quantum computing in MIMO system

A syndrome-based decoding method and apparatus for a block turbo code are disclosed. An embodiment of the present invention provides a syndrome-based decoding method for a block turbo code that includes an extended Hamming code as a component code, where the decoding method includes: (a) generating an input information value for a next half iteration by using channel passage information and the extrinsic information and reliability factor of a previous half iteration; (b) generating a hard decision word by way of a hard decision of the input information value; (c) calculating an n number of 1-bit syndromes, which corresponds to the number of columns or rows of the block turbo code, by using the hard decision word; and (d) determining whether or not to proceed with the next half iteration by using the calculated n number of 1-bit syndromes.

Syndrome-based decoding method and apparatus for block turbo code

The present disclosure relates to an &#x3b1;-aminoamide derivative compound and a pharmaceutical composition containing the same. According to various embodiments of the present disclosure, provided is a therapeutic agent which can overcome the disadvantages of existing drugs used as a MAO-B inhibitor and, specifically, reversibly inhibits MAO-B through a non-covalent bond so as to alleviate or eliminate the side effects of the existing drugs which exhibit a therapeutic effect by irreversibly acting via a covalent bond with MAO-B. Particularly, a new compound having superior stability and efficacy compared to the existing reversible MAO-B inhibitors may be provided.

Alpha-aminoamide derivative compound and pharmaceutical composition comprising same

A check node update processor of the low density parity check (LDPC) code decoder includes: an approximate first minimum (AFM) condition check unit which checks whether a predetermined specific condition is satisfied, and a check node determining unit which sets an approximate minimum value as a size of an entire check node output when it is determined that the specific condition is satisfied as a checking result in the AFM condition check unit and calculates a first minimum value as a true minimum value and sets a second minimum value as an approximate minimum value when it is determined that the specific condition is not satisfied to determine a size of the check node output.

Low density parity check code decoder and method for decoding LDPC code

The present disclosure relates to a low-complexity syndrome based decoding apparatus and method and a low-complexity syndrome based decoding apparatus includes: a hard decision unit which performs hard decision on a current input value to output a hard decision vector; a syndrome calculator which performs a syndrome operation on the hard decision vector and determines an error type of the hard decision vector based on the syndrome operation result; and a decoder which selects a predetermined decoding algorithm in accordance with the error type to perform the decoding, and the error type includes at least one of no error, a single error, and a double error.

Low-complexity syndrom based decoding apparatus and method thereof

Provided is a quantum error correction code generating method using a graph state. According to the exemplary embodiment of the present invention, a quantum error correction code generating method using a graph state: includes: generating a graph state representing an adjacency relationship between a plurality of qubits including at least one entangled qubit (ebit); generating a first stabilizer generator which corresponds to the graph state and is configured by a plurality of stabilizers for detecting errors of the plurality of qubits; and generating at least one logical Z operator used for a phase flip operation of a codeword, at least one logical X operator used for a bit flip operation of a codeword, and a second stabilizer generator which is a sub set of the first stabilizer generator, based on the first stabilizer generator and the at least one entangled qubit.

Method and apparatus for generating quantum error correction code using graph state

The present disclosure relates to a method and an apparatus for decoding polar codes and the polar code decoding method according to an exemplary embodiment of the present disclosure is a polar code decoding method performed by a polar code decoding apparatus which includes receiving a code word vector generated by polar encoding; and decoding the code word vector based on a soft cancellation (SCAN) decoding method and a round-trip belief propagation (BP) decoding method, in the decoding, an inner code of the code word vector may be decoded by the round-trip belief propagation method and an outer code may be decoded by the SCAN decoding method.

Apparatus and method for decoding polar codes

The method for shuffled decoding of LDPC codes includes calculating check-variable mutual information which is mutual information of a message propagating from a plurality of check nodes to a plurality of variable nodes by a check-variable mutual information calculating unit, calculating variable-check mutual information which is mutual information of a message propagating from the plurality of variable nodes to the plurality of check nodes connected to the plurality of variable nodes based on the check-variable mutual information by a variable-check mutual information calculating unit, and Calculating the entire mutual information which is a sum of variable-check mutual information for each of the plurality of variable nodes and determines an operation order of a variable node having the largest entire mutual information among the plurality of variable nodes to be next, by an operation order determining unit.

Method and apparatus for deciding decoding order for shuffled decoding of LDPC codes

The present disclosure relates to an &#x3b1;-aminoamide derivative compound and a pharmaceutical composition containing the same, for treating a neurodegenerative diseases.

A hybrid type iterative decoding method for a three-dimensional turbo product code (TPC) having a first axis (FA), a second axis (SA), and a third axis (TA) including: a parallel decoding step of applying a predetermined decoding algorithm (PDA) in parallel to current FA and SA input values (IVs) which are determined based on at least two previous decoding values (DVs), respectively, among the previous FA, SA and TA DVs which are generated in advance to generate a current FA DV and a current SA DV, respectively; a serial decoding step of applying PDA to a current TA IV determined based on the current FA and SA DVs to generate a current TA DV; and performing hard decision based on the current FAs DV, the current SA DV, the current TA DV, and the received signal value.

Hybrid type iterative decoding method and apparatus

The present disclosure relates to a pre-5-Generation (5G) or 5G communication system to be provided for supporting higher data rates Beyond 4-Generation (4G) communication system such as Long Term Evolution (LTE). Disclosed is an apparatus for performing an iteration decoding scheme for a Low Density Parity Check (LDPC) code. The apparatus includes a receiver configured to receive an encoded signal based on a parity matrix set for a plurality of variable nodes including a first variable node with a first degree and a second variable node with a second degree. The apparatus further includes a processor configured to determine at least one variable node based on a first threshold determined according to the first degree and a second threshold determined according to the second degree among the plurality of variable nodes and to generate decoded data from the signal based on the at least one determined variable node.

Apparatus and method for decoding LDPC code

Disclosed is a three-dimensional TPC decoding apparatus. A three-dimensional TPC decoding apparatus includes an X decoder which decodes an X axis of an m-th upper half layer based on decoding results of a Y axis and a Z axis of an m&#x2212;1-th upper half layer; a Y decoder which decodes a Y axis of an m-th lower half layer based on decoding results of an X axis and a Z axis of an m&#x2212;1-th lower half layer; and a Z decoder which decodes a Z axis based on a decoding result of the Y axis of an m-th upper half layer and a decoding result of the X axis of an m-th lower half layer.

Method and apparatus for decoding three-dimensional turbo product code based on crossing layers

The present disclosure relates to a pre-5th-generation (5G) or 5G communication system to be provided for supporting higher data rates beyond 4th-generation (4G) communication system such as a long term evolution (LTE). A method of a receiving apparatus in a communication system supporting a low density parity check (LDPC) code is provided. The method includes deactivating variable nodes of which absolute values of log likelihood ratio (LLR) values are greater than or equal to a first threshold value; changing LLR values of variable nodes of which absolute values of LLR values are less than a second threshold value among variable nodes other than the deactivated variable nodes to a preset value, and detecting LLR values of check nodes based on LLR values of the variable nodes other than the deactivated variable nodes.

Apparatus and method for determining log likelihood values of nodes in communication system supporting low density parity check code

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Seoul, South Korea

Jun Young Heo