Samsung Display Co., Ltd.

Jun-yong An

Yun-kyeong In

Nuree Um

Jaewon Kim

Ji-Eun Lee

Hyunae Park

Hyungjun Park

Donghyeon Jang

Seungwoo Sung

Junyoung Jo

Seunghan Jo

Min Jeong Kim

Young-soo Yoon

Wonkyu Kwak

Junwon Choi

Wonmi Hwang

Kwang-chul Jung

Won Se Lee

Taehoon Kwon

Ju-Hee Hyeon

Yu-Jin Jeon

Dae Suk Kim

Dong Hyeon Jang

A display device including a substrate, a plurality of first data lines and a plurality of second data lines. The substrate includes a display area, in which a hole is formed, and a hole edge area surrounding the hole. The plurality of first data lines are disposed on the substrate, extend in a first direction in the display area, are arranged in a second direction orthogonal to the first direction, and bypass the hole along the hole edge area. The plurality of second data lines are disposed on the substrate, extend in the first direction in the display area, are arranged adjacent to the plurality of first data lines, and bypass the hole along hole edge area. In the hole edge area, each of the plurality of first data lines and the plurality of second data lines are disposed on three layers different from each other.

Display device having a hole formed in a display area

A display panel including a first panel region (FPR) including (n−1)-th and n-th pixel rows ((n−1)PR and nPR), and a second panel region (SPR) dividing the nPR to propagate an optical signal. The display panel includes a circuit element layer (CEL) and a display element layer (DEL). The CEL includes a signal line (SL), a pixel driving circuit (PDC), and first to third regions. The SL and the PDC are in the first region. The second region (SR) corresponds to the SPR. The SL and the PDC are not in the SR. The third region (TR) corresponds to the SPR and is along a periphery of the SR. The SL is in the TR, and includes an (n−1)-th scan line ((n−1)SL) connected to the (n−1)PR, an n-th reset line (nRL) connected to the nPR, and a first row connection line in the TR and connecting the (n−1)SL and the nRL.

Display panel and electronic device including the same

A display device may include a plurality of pixel circuits disposed adjacent to each other, the plurality of pixel circuits including a plurality of active patterns disposed to correspond to the pixel circuits, respectively. Each of the active patterns includes a first initialization channel region to which an initialization voltage is applied, a second initialization channel region to which the initialization voltage is applied, and a third initialization channel region to which the initialization voltage is applied, the second initialization channel region of each of the active patterns is connected to the first initialization channel region of the adjacent active patterns, and a first end region of the third initialization channel region is connected between the first initialization channel region and the second initialization channel region.

Display device having driving initialization transistors and diode initialization transistor

A display device includes a substrate including a display area and a hole edge area defining a hole therein and surrounding the hole, where the display area surrounds the hole edge area, a plurality of pixels disposed in the display area in a first direction and a second direction intersecting the first direction, an emission control line extending in the first direction in the display area, and bypassing the hole along the hole edge area, a scan line extending in the first direction in the display area, located in the second direction from the emission control line, and bypassing the hole along the hole edge area, an active pattern disposed in the hole edge area, and overlapping the emission control line and the scan line in a plan view, and a connection line connected to the active pattern to provide a driving voltage to the active pattern.

OLED display device reducing luminance difference between pixel row where a hole is defined and not defined

A display device includes a substrate including sub-pixel circuit areas that are arranged in m rows and n columns, where m and n are positive integers, first gate lines extending in a row direction, data lines extending in a column direction, initialization power lines extending in the row direction, including first power lines disposed in sub-pixel circuit areas of odd rows and receiving a first initialization voltage and second power lines disposed in sub-pixel circuit areas of even rows and receiving a second initialization voltage, and transmission lines extending in the column direction, including first transmission lines disposed in sub-pixel circuit areas of odd columns and receiving the first initialization voltage from the first power lines and second transmission lines disposed in sub-pixel circuit areas of even columns and receiving the second initialization voltage from the second power lines.

Display device

A display panel includes a first panel region (FPR) including (n−1)-th and n-th pixel rows ((n−1)PR and nPR), and a second panel region (SPR) dividing the nPR to propagate an optical signal. The display panel includes a circuit element layer (CEL) and a display element layer (DEL). The CEL includes a signal line (SL), a pixel driving circuit (PDC), and first to third regions. The SL and the PDC are in the first region. The second region (SR) corresponds to the SPR. The SL and the PDC are not in the SR. The third region (TR) corresponds to the SPR and is along a periphery of the SR. The SL is in the TR, and includes an (n−1)-th scan line ((n−1)SL) connected to the (n−1)PR, an n-th reset line (nRL) connected to the nPR, and a first row connection line in the TR and connecting the (n−1)SL and the nRL.

An electronic apparatus includes a display panel including a base substrate including an active area and a peripheral area adjacent to the active area, pixels on the active area, pads on the peripheral area and arranged in a first direction, signal lines connecting the pixels to the pads, and a vernier mark on the peripheral area and spaced apart from the pads and the signal lines, a circuit board on the display panel and including a base film, and leads on the base film and overlapping with the pads in a plan view, and a conductive adhesive member extending in the first direction and between the display panel and the circuit board to connect the pads to the leads. The conductive adhesive member overlaps with the vernier mark when viewed in a second direction intersecting the first direction.

Display panel including vernier mark for aligning conductive adhesive member, electronic apparatus including the same, and method of manufacturing the electronic apparatus

A display device includes: a display panel in which a non-display region and a display region surrounding the non-display region are defined, wherein the display panel includes: a base layer comprising a first region in which a hole is defined corresponding to the non-display region, a second region surrounding the first region, and a third region corresponding to the display region; and first signal line parts disposed on the second region and the third region, the first signal line parts arrayed spaced apart from each other in a first direction, and each of the first signal line parts includes: a first line; a second line spaced apart from the first line; and a first connection part configured to connect the first line and the second line.

A display device includes a display panel that has a display area displaying an image and a non-display area around the display area. The display panel includes: a substrate; a plurality of connection lines on the substrate in the non-display area and including a first connection line and a second connection line adjacent to each other; a first dummy line overlapping and disposed on the first connection line; and a second dummy line overlapping the second connection line and disposed between the substrate and the second connection line.

Display device including dummy lines overlapping connection lines

A display panel includes a first panel region (FPR) including (n&#x2212;1)-th and n-th pixel rows ((n&#x2212;1)PR and nPR), and a second panel region (SPR) dividing the nPR to propagate an optical signal. The display panel includes a circuit element layer (CEL) and a display element layer (DEL). The CEL includes a signal line (SL), a pixel driving circuit (PDC), and first to third regions. The SL and the PDC are in the first region. The second region (SR) corresponds to the SPR. The SL and the PDC are not in the SR. The third region (TR) corresponds to the SPR and is along a periphery of the SR. The SL is in the TR, and includes an (n&#x2212;1)-th scan line ((n&#x2212;1)SL) connected to the (n&#x2212;1)PR, an n-th reset line (nRL) connected to the nPR, and a first row connection line in the TR and connecting the (n&#x2212;1)SL and the nRL.

There is provided a display device including a display panel including a first display area and a second display area that include a plurality of pixels, a scan driver configured to provide a scan signal to the pixels, the scan driver being at least partially between the first display area and the second display area, a data driver configured to provide a data signal to the pixels, an emission controller configured to provide an emission control signal to the pixels, the emission controller being at a side of the first display area and at a side of the second display area, and a timing controller configured to generate a control signal that controls the scan driver, the data driver, and the emission controller.

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Asan-si, South Korea

Jun-yong An