Nxp Usa, Inc.

Jun Xie

Mohit Arora

Rakesh Pandey

Yong Wang

Mingle Sun

Lihang Zhang

Chongbin Fan

A hierarchical system firewall, comprising a root security manager, secondary security managers, a firewall controller, and firewalls. The root security manager designates a secondary security manager and allocates a system resource for each domain cluster, and provides firewall configuration schemes between the domain clusters. The secondary security managers add domain identifiers for hosts and devices of domain clusters, and provides a firewall configuration scheme for each domain. The firewall controller adds domain cluster identifiers for the hosts and devices in the system, and adds identification for the secondary security managers; allocates domain identification for a host and a device of a current domain cluster; and configures access permissions for the firewall of each device in the current domain cluster. The firewalls perform permissions control for access to a current device by hosts from different domains or different domain clusters. Further provided in the present invention is a configuration method for the hierarchical system firewall, simplifying system design, and improving system security.

Hierarchical system firewall and configuration method

A one-time programmable (OTP) memory has a plurality of pages. A predefined section of each page is configured to store error policy bits. When an indicator in a first predefined location has a first value, the page is configured to store data with error correction code (ECC) bits, and when the indicator has a second value, at least a portion of the page is configured to store data with redundancy. Address translation circuitry is configured to, in response to receiving an access address, use a second predefined location of an accessed page of the plurality of pages accessed by the access address to determine a physical address in the accessed page which corresponds to the access address.

Integrated circuits and methods for dynamic allocation of one-time programmable memory

A device for reading data from a first memory to a second memory based on real-time blank page detection includes a memory controller for reading a page of data from the first memory, a buffer for buffering a portion of the page data, a blank page pre-detection unit for generating a pre-detection result that indicates whether the page is a blank page based on a pre-determined part of the page data, a data processing unit for processing all of the page data to identify a page type, and a control unit for signaling the memory controller to read the page of data from the first memory and enabling the data processing unit based on the pre-detection result.

Method and apparatus for real-time blank page detection in data transmission

An integrated circuit includes a one-time programmable (OTP) memory having a plurality of pages and address translation circuitry. A first line of each page is configured to store error policy bits. When a first bit of the first line has a first value, the page is configured to store data with error correction code (ECC) bits, and when the first bit has a second value, at least a portion of the page is configured to store data with redundancy. The address translation circuitry is configured to, in response to receiving an access address, use the first line of an accessed page of the plurality of pages accessed by the access address to determine a physical address in the accessed page which corresponds to the access address.

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Shanghai, China

Jun Xie