Kookmin University

Jun Tae Jang

Dae Hwan Kim

Sung Jin Choi

Dong Myoung Kim

Donguk Kim

Shin Young Park

Wonjung Kim

Dong Yeon Kang

Hyun Kyu Lee

Disclosed is a synaptic transistor, including a substrate, an expansion gate electrode disposed to extend in one direction on the substrate, a gate insulating layer including ions, covering the expansion gate electrode, and disposed on the substrate, a channel layer disposed on the gate insulating layer to correspond to one end of the expansion gate electrode, source and drain electrodes spaced apart from each other, covering both ends of the channel layer, and disposed on the gate insulating layer, and a pad electrode disposed on the gate insulating layer to correspond to the other end of the expansion gate electrode.

Synaptic transistor with long-term and short-term memory

The present invention relates to a synapse and synaptic array, and a computing system using the same. The synaptic device according to an exemplary embodiment of the present invention includes a transistor in which a synaptic input signal is applied to any one electrode of source and drain electrodes; and a plurality of two-terminal variable resistance memory devices in which a first electrode is electrically globally connected to a gate electrode of the transistor, wherein a separate memory voltage is applied to a second electrode of each variable resistance memory device to adjust a gate voltage applied to the gate electrode, thereby controlling a synaptic output signal which is output to the other one of the source and drain electrodes.

Synapse and synaptic array, and computing system using the same and driving method thereof

Growing community of inventors

Bucheon-si, South Korea

Jun Tae Jang