Skhynix Inc.

Daewoong Pharmaceutical Co., Ltd.

Jun Sik Kim

Hyun Chul Seo

Duck Soo Lim

In Ho Kim

Se Ra Hwang

Ji Young Oh

Tae Ho Lee

Sung Hoon Park

The present invention provides a two-chamber type combined container-syringe including: a cylinder having a first end portion, a second end portion in an opposite direction of the first end portion, and a bypass portion disposed between the first end portion and the second end portion; a finger grip mounted on the second end portion of the cylinder; a first stopper, a second stopper, and a third stopper that are sequentially disposed from the first end portion toward the second end portion in a space of the cylinder; and a plunger rod that is connected to the third stopper and has a plurality of support ribs provided to come in contact with an inner surface of the finger grip, wherein a space between the first stopper and the second stopper forms a front chamber, a space between the second stopper and the third stopper forms a rear chamber, a first ingredient and a second ingredient are accommodated in the front chamber and the rear chamber, respectively, a length ratio of the front chamber and the rear chamber is in a range of 1.6:1 to 3:1 when the plunger rod is at an initial position which is a state before the front chamber and the rear chamber communicate with each other through the bypass portion, and at the initial position, one or more support ribs are disposed in at least one of the finger grip and a region in the cylinder that is adjacent to the finger grip.

Two-chamber type combined container-syringe

A semiconductor device includes: an isolation layer formed to define active regions including active fins in a substrate; gate trenches extending across the active fins and the isolation layer; and buried gates that fill the gate trenches, and include fin gates disposed on sidewalls of the active fins, active gates disposed over the active fins, and passing gates disposed over the isolation layer, wherein bottom surfaces of the passing gates are disposed at a higher level than bottom surfaces of the active gates, and bottom surfaces of the fin gates are disposed at a lower level than the bottom surfaces of the active gates.

Semiconductor device and method for fabricating the same

A semiconductor device includes a substrate; multi-level interconnections disposed on the substrate; a first passivation layer containing hydrogen and covering top interconnections among the multi-level interconnections; a second passivation layer disposed over the first passivation layer to prevent out-diffusion of the hydrogen from the first passivation layer; an in-line top dielectric layer over the second passivation layer; an in-line redistribution layer connected to one among the top interconnections by passing through the in-line top dielectric layer, the second passivation layer, and the first passivation layer; and a hydrogen blocking liner disposed between the in-line redistribution layer and the first passivation layer.

Present invention relates to a highly-integrated memory cell and a semiconductor device including the same. According to an embodiment of the present invention, a semiconductor device comprises: an active layer including a channel, the active layer being spaced apart from a substrate and extending in a direction parallel to a surface of the substrate; a gate dielectric layer formed over the active layer; a word line laterally oriented in a direction crossing the active layer over the gate dielectric layer and including a low work function electrode and a high work function electrode, the high work function electrode having a higher work function than the low work function electrode; and a dipole inducing layer disposed between the high work function electrode and the gate dielectric layer.

The present disclosure relates to a syringe safety cap and a safety syringe including the same. One aspect of the present disclosure provides a syringe safety cap including a base portion having a mounting portion to be mounted on a cylinder of a syringe, a link portion rotatably connected to the base portion, a first elastic portion configured to provide a rotational force so that the link portion rotates with respect to the base portion, a safety cover portion rotatably connected to the link portion, detachably fixed to the base portion, and configured to, when detached from the base portion and rotating, surround an injection needle of the syringe, and a second elastic portion configured to provide a rotational force so that the safety cover portion rotates with respect to the link portion.

Syringe safety cap and safety syringe including the same

A semiconductor package includes a semiconductor chip and a package substrate. The semiconductor chip is mounted on the package substrate. The package substrate includes a dielectric layer through which a vent hole penetrates, trace patterns disposed on the dielectric layer, and a protecting block disposed between the trace patterns and the vent hole.

Semiconductor package and package substrate including vent hole

A semiconductor package according to an aspect of the present disclosure includes a package substrate and a plurality of semiconductor chips stacked on the package substrate. Each of the semiconductor chips includes a chip body, at least one first side power pad and at least one first side ground pad that are disposed on a first side portion on one surface of the chip body, and at least one second side power pad and at least one second side ground pad that are disposed on a second side portion opposite to the first side portion on one surface of the chip body. One of the second side power pads is disposed point-symmetrically to corresponding one of the first side power pads with respect to a reference point on the one surface, and one of the second side ground pads is disposed point-symmetrically to corresponding one of the first side ground pads with respect to a reference point on the one surface.

Semiconductor package including semiconductor chip having point symmetric chip pads

A semiconductor chip module includes a chip unit including first and second semiconductor chips formed over a single body to be adjacent in a first direction with a scribe line region interposed therebetween, and having a first surface over which bonding pads of the first and second semiconductor chips are positioned; redistribution lines formed over the first surface, having one set of ends which are respectively electrically coupled to the bonding pads, and extending in a direction oblique to the first direction toward the scribe line region; and redistribution pads disposed over the first surface, and electrically coupled with another set of ends of the redistribution lines. The redistribution pads includes shared redistribution pads electrically coupled in common to the redistribution lines electrically coupled to the bonding pads of the first semiconductor chip and the redistribution lines electrically coupled to the bonding pads of the second semiconductor chip; and individual redistribution pads individually electrically coupled to the redistribution lines which are not electrically coupled with the shared redistribution pads.

Growing community of inventors

Icheon-si, South Korea

Jun Sik Kim