Sony Corporation

Sony Semiconductor Solutions Corporation

Sony Group Corporation

Sumitomo Electric Industries, Limited

Jun Okuno

Kazuyoshi Yamashita

Takeyuki Sone

Seiji Nonoguchi

Yusuke Shuto

Toshiyuki Kobayashi

Taketo Fukuro

Hiroshi Yoshida

Makoto Kitagawa

Kazuhiro Ohba

Hiroyuki Fujita

Minoru Ikarashi

Toshio Mizue

Haruhiko Terada

Masanori Tsukamoto

Hiroaki Sei

Hiroki Koga

Rui Morimoto

Yotaro Mori

The present disclosure relates to a semiconductor device enabling to suppress waste of energy consumption. There is provided a semiconductor device including: an input unit configured to input a charge; a memory unit configured to collect and accumulate a charge from the input unit; and an output unit configured to detect and output a charge accumulated in the memory unit. The memory unit includes a transfer unit to which a plurality of pairs of a gate unit and an accumulation unit is connected, the gate unit selects the accumulation unit that accumulates a charge, the transfer unit transfers a charge from the input unit to the accumulation unit selected by the gate unit, the accumulation unit accumulates a charge transferred from the transfer unit, and the transfer unit transfers a charge accumulated in the accumulation unit selected by the gate unit, to the output unit. The present disclosure can be applied to, for example, an analog memory device.

Semiconductor device

Semiconductor devices and multiply-accumulate operation devices are disclosed. In one example, a semiconductor device includes synapses in which a nonvolatile variable resistance element taking a first resistance value and a second resistance value lower than the first resistance value and a fixed resistance element having a resistance value higher than the second resistance value are connected in series. An output line outputs a sum of currents flowing through the plurality of synapses.

Semiconductor device and multiply-accumulate operation device

A ferroelectric memory is intended to reduce an applied voltage required at the times of writing and reading. A ferroelectric capacitor includes a ferroelectric film and a top electrode and a bottom electrode including materials with different work functions formed above and below the ferroelectric film. The transistor is connected to either the top electrode or the bottom electrode to select the ferroelectric capacitor. A drive control unit applies, at the times of writing and reading, a voltage lower than that at the time of erasing by a predetermined potential difference to the ferroelectric film.

Ferroelectric memory and memory element thereof

The present technology relates to a solid-state imaging device and a driving method thereof, and an electronic apparatus that make it possible to improve the precision of phase difference detection while suppressing deterioration of resolution in a solid-state imaging device having a global shutter function and a phase difference AF function. Provided is a solid-state imaging device including: a pixel array unit including, as pixels including an on-chip lens, a photoelectric conversion unit, and a charge accumulation unit, imaging pixels for generating a captured image and phase difference detection pixels for performing phase difference detection arrayed therein; and a driving control unit configured to control driving of the pixels. The imaging pixel is formed with the charge accumulation unit shielded from light. The phase difference detection pixel is formed in a manner that at least part of at least one of the photoelectric conversion unit and the charge accumulation unit refrains from being shielded from light. The present technology can be applied to, for example, a CMOS image sensor.

Light detecting device with light shielding films, and electronic apparatus

A disclosed semiconductor device includes a memory cell with a first terminal, a second terminal, a memory element having a first resistance state and a second resistance state, and a nonlinear element, and a drive controller that performs a first operation that allows the memory element to be in the first resistance state, a second operation that allows the memory element to be in the second resistance state, a third operation in which the voltage of the first and second terminals is caused to be different from each other and a value of electric current flowing between the first terminal and the second terminal is caused to be limited to a first current value to determine the resistance state, and a fourth operation in which the current value is caused to be limited to a second current value. The drive controller performs the fourth operation after at least one of the first to third operations.

A memory apparatus includes a memory cell disposed at an intersection of a first wiring line and a second wiring line, and including a variable resistor and a selector, the variable resistor having a resistance state that changes to a first resistance state and a second resistance state, and a drive circuit that writes data to the memory cell by changing the variable resistor from the first resistance state to the second resistance state, and erases the data stored in the memory cell by changing the variable resistor from the second resistance state to the first resistance state. When erasing the data, the drive circuit changing in a stepwise manner a voltage applied to the memory cell, and changing in a stepwise manner a current limit value that limits a magnitude of a current flowing through the memory cell.

Memory apparatus and method of controlling memory apparatus

Provided is a circuit element that includes paired inert electrodes, and a switch layer provided between the paired inert electrodes, that functions as a selection element and a storage element as a single layer, and having a differential negative resistance region in a current-voltage characteristic.

Circuit element, storage device, electronic equipment, method of writing information into circuit element, and method of reading information from circuit element

Solid-state imaging device and driving method thereof, and electronic apparatus

Solid-state imaging device with light shielding film and driving method thereof, and electronic apparatus

Apparatus and method for improved precision of phase difference detection

Embodiments of the present invention describe a method for fabricating a memory device comprising an enlarged space between neighboring bottom electrodes comprising depositing a poly-silicon layer on a substrate depositing a carbon layer above the poly-silicon layer, patterning a photo-resist layer on the carbon layer, depositing a first spacer layer on the photo-resist layer and performing a modified photolithography process on the photo resist layer after etching back the spacer layer creating sidewalls.

Methods for fabricating a memory device with an enlarged space between neighboring bottom electrodes

Phase difference detection while suppressing deterioration of resolution

There is provided a solid-state image sensor including a pixel region in which a plurality of pixels of a preset plurality of colors are arranged in a two-dimensional matrix shape, a vertical signal line corresponding to a pixel column of the pixel region, a trigger line corresponding to a pixel row of the pixel region and supplying a trigger pulse corresponding to each of the colors of the plurality of pixels, and a trigger pulse supply part supplying, via the trigger line, the trigger pulse in a manner that a signal voltage of each pixel of a predetermined color in the pixel region is read out for each pixel row via the vertical signal line, and thereafter, a signal voltage of each pixel of another color in the pixel region is read out for each pixel row via the vertical signal line.

Growing community of inventors

Kanagawa, Japan

Jun Okuno