Sharp Kabushiki Kaisha Corporation

Kyocera Document Solutions Inc.

Kyocera Mita Corporation

Sharp Kabushiki Kiasha

Jun Nishimura

Akira Tagawa

Yasuaki Iwase

Yohei Takeuchi

Takuya Watanabe

Atsuhito Murai

Yukinobu Nakata

Shinya Tanaka

Tetsuo Kikuchi

Hajime Imai

Hideki Kitagawa

Yoshimasa Chikama

Junya Shimada

Kazunori Morimoto

Mitsunori Imade

Yoshihito Hara

Tetsuya Yamashita

Yoshiharu Hirata

Shingo Kawashima

Mizue Kadobayashi

An active matrix substrate includes first and second TFTs. The first TFT includes a first lower electrode, a first insulating layer, a first oxide semiconductor layer, and a first gate electrode. The first oxide semiconductor layer includes a first channel region overlapping the first gate electrode when viewed in a normal direction of the substrate. The first lower electrode has a first light-shielding portion overlapping the entire first channel region and including a first metal film. The second TFT includes a second lower electrode, the first insulating layer, a second oxide semiconductor layer, and a second gate electrode. The second oxide semiconductor layer includes a second channel region overlapping the second gate electrode when viewed in the normal direction. The second lower electrode has a light-transmitting portion overlapping the second channel region and including a first transparent conductive film but not a light-shielding metal film.

Active matrix substrate

A gate driver is constituted of a first gate driver including a first shift register that is configured by bistable circuits corresponding to gate bus lines on odd-numbered lines arranged on one side of a display portion, and a second gate driver including a second shift register that is configured by bistable circuits corresponding to gate bus lines on even-numbered lines arranged on another side of the display portion. A first buffer circuit is provided on one end side of each gate bus line, and a second buffer circuit is provided on another end side of each gate bus line. A control signal for controlling the scanning order of the gate bus line is given to the bistable circuit and the second buffer circuit.

Display device capable of high-speed charging/discharging and switching scanning order of gate bus lines

A display device includes a first display panel with a touch function, a second display panel without a touch function, a first data line drive circuit and a first demultiplexer circuit configured to drive data lines of the first display panel in a time-division manner in accordance with K first control signals, and a second data line drive circuit and a second demultiplexer circuit configured to drive data lines of the second display panel in a time-division manner in accordance with K second control signals. A horizontal period used to drive the first display panel is shorter than a horizontal period used to drive the second display panel, and a length of a period in which each of the first control signals is at a selection level and a length of a period in which each of the second control signals is at a selection level are approximately the same.

Liquid crystal display device with display quality difference prevention between display panels

An image forming apparatus is used in a post-payment system based on a customer's electronic money, and includes an image forming section, a communication section, and a controller. The image forming section performs a printing operation of forming an image on a sheet. The communication section performs communication so as to acquire settlement information including information that identifies the customer. The controller controls the image forming section and the communication section. As to the printing operation performed after acquisition of the settlement information, the controller settles a printing fee with a discount in a unit price per sheet in a situation where a printed sheet count is a predetermined number or more.

Image forming apparatus

A gate driver is constituted of a first gate driver including a first shift register that is configured by bistable circuits corresponding to gate bus lines on odd-numbered lines arranged on one side of a display portion and can switch a shift direction, and a second gate driver including a second shift register that is configured by bistable circuits corresponding to gate bus lines on even-numbered lines arranged on another side of the display portion and can switch the shift direction. A first buffer circuit is provided on one side of both ends of each gate bus line, and a second and a third buffer circuits are provided on another side thereof.

Scanning signal line drive circuit, display device provided with same, and driving method of scanning signal line

A unit circuit that constitutes a shift register includes a gate output lowering transistor (T) whose source terminal is supplied with a second gate low voltage (Vgl) and a gate output reset transistor (T) Whose source terminal is supplied with a first gate low voltage (Vgl), as constituent elements associated with the lowering of gate output. At the time of lowering the gate output, the gate output lowering transistor (T) is made to be in an on state, and thereafter the gate output reset transistor (T) is made to be in the on state. In this case, the gate terminal of the gate output reset transistor (T) is supplied with a scanning signal or a signal having a waveform equivalent to that of the scanning signal outputted from the unit circuit in a subsequent stage.

Scanning signal line drive circuit and display device provided with same

In a display device that adopts an SSD scheme, a demultiplexer circuit has provided for each source bus line, a compensating transistor whose first conduction terminal is connected to the source bus line and whose second conducting terminal is maintained in a floating state. In such a configuration, for example, at the same timing as a connection control transistor changes from an on state to an off state due to a change from a high level to a low level of a control signal that is supplied to a control terminal of the connection control transistor, a control signal that is supplied to a control terminal of the compensating transistor changes from the low level to the high level.

Display device

A display panel displaying an image includes a first substrate, a second substrate disposed opposite the first substrate, electric optical substance sealed between the first substrate and the second substrate, a transistor disposed on the first substrate and supplying an electric signal to the electric optical substance and including an oxide semiconductor film as an activating layer, and a light blocking film disposed on the second substrate and blocking visible light from transmitting therethrough, the light blocking film having a hole in a position overlapping the transistor in a plan view.

Display panel and display device

In a display device including an active matrix substrate in which a demultiplexing circuit is formed, a boost circuit, which generates a plurality of connection control signals respectively applied to gate terminals of a plurality of connection control transistors as switching elements configuring the demultiplexing circuit are respectively generated, is provided in the demultiplexing circuit. An internal node of each boost circuit is precharged via a transistor turned on by a boosted voltage of an internal node of another boost circuit, and thereafter, a voltage of the internal node of the boost circuit is boosted via a boost capacitor by a control signal applied to a demultiplexing circuit. The boosted voltage of the internal node is applied to a gate terminal of a connection control transistor as a connection control signal.

Active matrix substrate, display device, and drive method therefor

To prevent a decrease in display quality caused when a display apparatus performs pause driving. One end of the n-th scanning signal line (GLn) is connected to the n-th stage circuit (UCn) of a driver circuit. The other end of the n-th scanning signal line is connected to a waveform adjusting circuit (HKn) which adjusts the waveform of the pulse signal of the n-th scanning signal line (GLn) by using a clock signal (CKA) and the pulse signal of the m-th scanning signal line (GLn&#x2212;1) scanned prior to the n-th scanning signal line.

Display device including a driver circuit outputting a pulse signal to scanning signal lines and method of driving the display device

[Object] An object is to suppress an occurrence of display unevenness in a pause-and-drive operation. [Solution] A display device configured to perform pause-and-drive operation includes an nth stage circuit connected to one end of an nth gate bus line, and an nth transistor connected to the other end of the nth gate bus line. One of a first clock signal group (AGCKto AGCK) is input to the nth stage circuit. One of a second clock signal group (BGCKto BGCK) is input to the nth transistor. In a pause period in which all clock signals of the first clock signal group are fixed at an inactive level, one or more pulses (Pto P) are included in the second signal group.

In a server authentication process, a controller (a) transmits identification information of a consumable unit to an authentication server, and causes the authentication server to determine whether the consumable unit is a genuine product or not on the basis of the identification information and (b) receives the genuine product determination result from the authentication server. Further, (a) upon detecting replacement of the consumable unit, the controller reads identification information from a storage device of the consumable unit, performs the server authentication process based on the read identification information, and stores the received genuine product determination result into the non-volatile storage device, and (b) when powered on, the controller determines whether the consumable unit currently mounted is a genuine product or not on the basis of the genuine product determination result stored in the non-volatile storage device, without performing the server authentication process.

Image forming apparatus performing genuine product determination for consumable unit

When supply of power has stopped, voltages of GDM signals are set as follows. A clear signal that contributes to removal of charge at floating nodes (an output control node and a stabilization node) in each unit circuit included in a shift register is set to a voltage of ground, and other signals (a gate start pulse signal, gate clock signals, and a reference voltage) are set to a gate-on voltage. To implement such settings, a single power supply system configuration that uses a voltage of only one channel as a scanning line selection voltage is adopted.

Display device suppressing display failure caused by residual charge

Provided is an active matrix substrate () that includes multiple inspection TFTs (Q) that are arranged in a non-display area (), and an inspection circuit () that includes multiple inspection TFTs (Q). At least one or more of the multiple inspection TFTs (Q) are arranged within a semiconductor chip mounting area (R) in which a semiconductor chip is mounted. Each of the multiple inspection TFTs (Q) includes a semiconductor layer, a lower gate electrode (FG) that is positioned on a side of the substrate of the semiconductor layer with a gate insulation layer in between, an upper gate electrode (BG) that is positioned on a side opposite to the side of the substrate of the semiconductor layer with an insulation layer including a first insulation layer in between, and a source electrode and a drain electrode that are connected to the semiconductor layer.

Active matrix substrate and display device provided with active matrix substrate

The postprocessing device includes: a stapling unit for stapling a sheet bundle with a staple; a discharge tray to which a bound sheet bundle bound with the staple is to be discharged; a moving member movable in both a direction of approaching the discharge tray and a direction of going away from the discharge tray; and a control section for, when the bound sheet bundle has been discharged, driving the moving member to execute a process of making the moving member hit against the bound sheet bundle or against the discharge tray.

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Osaka, Japan

Jun Nishimura