Hitachi, Ltd.

Hitachi Vlsi Engineering Corp.

Hitachi Microcomputer Engineering, Ltd.

Hitachi, Vlsi Eng. Corp.

Jun Ishida

Yoshimune Hagiwara

Kenji Kaneko

Atsushi Kiuchi

Tetsuya Nakagawa

Hirotada Ueda

Tomoru Sato

Hitoshi Matsushima

Shigeki Masumura

Takashi Akazawa

Noriyasu Suzuki

In a single chip processor which can be provided with an extended program memory, a high-speed access can be executed without being restricted by the access time for the external program memory when an internal program memory is employed, by varying the effective instruction cycle, and thus a high-speed processing performance for a single chip processor of a stored program type can be attained.

Single chip processor

A plurality of external input information are added to a selecting circuit. The output of the selecting circuit is fed back as one of the external input information to the selecting circuit. The input signal groups are decoded, and are produced as control signals to specify the external input information in synchronism with clock signals. When the input select signal groups have the non-selection mode, the output that is fed back is necessarily selected.

Selecting means for selecting a plurality of information

This invention relates to an information processing apparatus such as a digital signal processor and is applied particularly suitably to a digital filter. A plurality of data from initial value data till final value data relating to filtering coefficients of a digital filter are stored in a data memory, and are sequentially read out by an increment operation of an address arithmetic unit. A data arithmetic unit executes sequentially product and/or sum operations of a plurality of data that are sequentially read out and digital input signals that are sequentially inputted, to perform digital signal processing. The information processing apparatus is equipped particularly with means, which when an access address starts from an initial value, exceeds a final value and reaches a return address due to the increment operation, returns automatically the access address to the initial value. Therefore, a plurality of data stored in the data memory can be utilized repeatedly. Contrivances are made in order to set the number of a plurality of data that are stored in the data memory for repetition of use, to an arbitrary value.

Information processing apparatus

A memory circuit is divided into a plurality of memory blocks, and an address register and a delay register are disposed in each memory block. Therefore, a read or write operation and a shifting operation of the address for storing data inside a memory matrix can be realized by a pipeline technique, and hence a memory circuit having a high processing speed is obtained.

Memory circuit and method of controlling the same

Growing community of inventors

Koganei, Japan

Jun Ishida