Hitachi, Ltd.

Hitachi Device Engineering Co., Ltd.

Jun-ichi Ohwada

Nobutake Konishi

Masaaki Kitajima

Hideaki Kawakami

Yoshiharu Nagae

Masayoshi Suzuki

Akio Mimura

Masaaki Kitazima

Kikuo Ono

Takeshi Tanaka

Kenji Miyata

Takashi Suzuki

Eiichi Maruyama

Masahiko Suzuki

Yasuhiro Shiraki

Masaru Takabatake

Kenkichi Suzuki

Akira Ishii

Takaya Suzuki

Kohji Takahashi

Kimitoshi Ohgiichi

Sakae Someya

Makoto Matsui

Tsutomu Isono

Tatsuo Kamei

Yoshikazu Hosokawa

Kenichi Iwamoto

Yoshio Owaki

Ono Kikuo

Masao Yoshimura

In a liquid crystal display in which the region around a display region is reduced, a black matrix BM is made of a colored organic resin. Substantially all over the periphery of a seal member SL, there are formed portions in which the seal member SL and the black matrix BM are and are not overlapped. A shielding tape TAPE is stuck to that portion of the lower face of a lower transparent glass substrate SUB1, which corresponds to the non-overlapped portion, to prevent the leakage of light from the seal portion.

Liquid crystal display device having a shielding film for shielding

A method for driving a liquid crystal display device including a TFT liquid crystal display panel. The TFT liquid crystal display panel includes a plurality of pixel electrodes, a common electrode opposing the pixel electrodes, and a liquid crystal layer disposed between the pixel electrodes and the common electrode. The method includes the steps of generating a plurality of positive gradation voltages with a first voltage dividing resistor circuit, the first voltage dividing resistor circuit being a single series circuit formed by a plurality of resistors connected in series, each of the positive gradation voltages being higher than a midpoint voltage Vasc, generating a plurality of negative gradation voltages with a second voltage dividing resistor circuit, the second voltage dividing resistor circuit being a single series circuit formed by a plurality of resistors connected in series, each of the negative gradation voltages being lower than the midpoint voltage Vasc and being paired with a respective one of the positive gradation voltages, thereby providing a plurality of paired positive and negative gradation voltages, and applying the positive gradation voltages and the negative gradation voltages to the pixel electrodes in accordance with a display signal representing information to be displayed on the TFT liquid crystal display panel. Respective averages of the paired positive and negative gradation voltages are positive, and increase with respect to a reference voltage VC as respective differences between the paired positive and negative gradation voltages decrease, the reference voltage VC being lower than the midpoint voltage Vasc.

Method of driving an active matrix liquid crystal display panel with

A testing method is provided for a semiconductor device which includes a control terminal and a pair of main terminals wherein one of the main terminals is isolated from the outside by a dielectric. First, a voltage which changes with time is applied to the isolated main terminal through the dielectric. A control signal which controls conduction and non-conduction of the semiconductor device is the applied to the control terminal. Following this, the test is made by detecting a displacement current flowing through at least one of the two main terminals and the control terminal.

Method for testing an on-off function of semiconductor devices which

A plane display includes a plurality of pixel capacitors, each of which includes first and second electrodes and a non-linear optical material disposed therebetween. A plurality of storage capacitors are respectively provided in association with the plurality of pixel capacitors, each of which includes the first electrode of the corresponding pixel capacitor, an insulating film, and a third electrode insulated from the first electrode through the insulating film and connected to an external power supply terminal. Additionally, a provided for each storage capacitor and connected between the third electrode of the associated storage capacitor and the external power supply terminal, for preventing a potential drop causable in the course of storing electric charge in the associated storage capacitor.

Plane display

A half tone liquid crystal display circuit is disclosed including a voltage divider using as a reference voltage a voltage which is approximately determined on the basis of a point of intersection of the extensions of straight lines along the gradients of brightness-voltage characteristics corresponding to at least two observation angles vertically different with respect to a liquid crystal display panel having a TFT active matrix structure to generate driving voltages for the half tone displays associated with a voltage varied to correspond to the observation angles; and a correcting voltage waveform generator for generating a dynamic observation angle correcting voltage varied in association with a vertical scanning operation corresponding to the difference in the vertical observation angles of a liquid crystal display frame. The half tone driving voltages generated by the voltage divider from the dynamic observation angle correcting voltage are subjected to level modulations.

Half tone liquid crystal display circuit with an A.C. voltage divider

A gray scale display, which is provided with a liquid crystal panel consisting of switching elements and a liquid crystal layer superposed thereon; a digital-time function transforming device for transforming digital signals including gray scale information into time function signals; and a time function-gray scale transforming device for sampling a brightness reference signal varying with respect to time, responding to the time function signals and generating gray scale signals corresponding to the signal voltage applied to the switching elements. The time function-gray scale transforming device, in which the brightness reference signal is inputted, samples the signal, responding to time function signals such as a pulse phase signal, a pulse width signal, etc., to obtain a signal voltage. In this way it is possible to reduce the size of a signal voltage generating circuit and to lower signal speed of the operation of the circuit.

Gray scale display

A high-speed scanning method uses a K(K.gtoreq.3)-number of semiconductor switch elements each having a first main electrode responsive to an input signal, a second main electrode, and a control electrode responsive to a control signal for controlling the transmissive and intransmissive states of said input signal from the first main electrode to the second main electrode; and capacitive loads connected respectively with the second main electrode of each of said K-number of semiconductor switch elements, for shifting one of the K-number of semiconductor switch elements sequentially with a predetermined period from the transmissive state to the intransmissive state or vice versa, wherein, the time, for which an arbitary L(K&gt;L.gtoreq.2)-number of semiconductor switch elements of adjacent scans are rendered transmissive, and the time, for which the L-number of semiconductor switch elements are rendered intransmissive, are included in at least one frame period, to elongate the period for which the scanning signals fluctuate, thereby permitting use of low-frequency semiconductor switches.

Method and circuit for scanning capacitive loads

Complementary thin fillm transistors (C-TFT) formed on an insulating substrate, comprising a pair of highly resistive n-type silicon islands, a pair of heavily doped n-type regions formed in one of the islands to form source and drain regions of n-channel TFT, a pair of contacts formed on the surface of the other island and establishing a high potential barrier when the underlying region is of n-type and a low potential barrier when the underlying region is inverted to be of p-type. The process for manufacturing complementary TFTs can be simplified significantly.

Thin film semiconductor device and method of manufacturing the same

In a display device having, at least, picture elements which are arrayed on a transparent insulating substrate, and transistor portions which are formed of a semiconductor layer formed on the transparent insulating substrate; a display device characterized in that, at least, interconnection parts of the transistor portions extend above the semiconductor layer formed on the transparent insulating substrate. The disconnection of the interconnection parts can be avoided.

Display device

A display device consisting of a plurality of scanning electrodes, a plurality of signal electrodes, a driving circuit feeding these electrodes with a scanning voltage and a signal voltage applied thereto, display elements having a pair of electrodes opposite to each other, which are disposed on the intersecting portion of the signal electrodes with the scanning electrodes, and switching elements controlling the feeding of one of the electrodes with the signal voltage, depending on the scanning voltage, comprises further a delaying circuit, which retards the timing of applying the signal voltage applied to a part of the signal electrodes, which are distant from the input terminal of the scanning voltage, with respect to the timing of applying the scanning voltage applied to the scanning electrodes.

Display device comprising a delaying circuit to retard signal voltage

In a matrix display device, a signal drive circuit comprises selection means for sequentially selecting at least one of display information signals corresponding to a plurality of signal electrodes when at least one of a plurality of scan electrodes is selected, hold means for holding the display information signal selected by the selection means until selection of at least corresponding scan electrode is completed, and voltage conversion means for selecting one of a plurality of voltage levels in accordance with the display information signal held by the hold means and supplying the selected voltage level to the signal electrodes. Since the display information signal is held by the hold means until the selection of at least corresponding scan electrode is completed, one of the plurality of voltage levels is always applied to the signal electrodes and the switching elements do not assume the high impedance state. Accordingly, ununiformity in display image is prevented and a large size matrix display device is provided.

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Hitachi, Japan

Jun-ichi Ohwada