Samsung Display Co., Ltd.

Samsung Electronics Co., Ltd.

Jun-Hyun Park

An-Su Lee

Chong-Chul Chai

Bo-Yong Chung

Kang-Moon Jo

Young-Wan Seo

Kyoung-Ju Shin

Sung-Hwan Kim

Je-Hun Lee

Sang-uk Lim

Yang-Hwa Choi

Sei-yong Park

Byung-Du Ahn

Jae-Woo Park

Do-Hyun Kim

Sung-Chul Kim

Dong-Woo Kim

Dong-Kyu Kim

Dae-Hwan Kim

Xinxing Li

Yong-Woo Jeon

Moo-Young Kim

Sung-hwan Kim

Ji-Hye Lee

Chan-Woo Yang

Xun Zhu

Jeong-Ju Park

Ho-Seok Kang

Hye-Kyoung Jeon

Sung-Koo Lee

Woong-Ho Hong

A display device including a substrate, a first upper power line, a conductive member, a protective insulating layer, an upper connection member, and a sub-pixel structure. The upper connection member is disposed in a first pad area and a first peripheral area on a planarization layer, and electrically connects the first upper power line and the conductive member through a first contact hole, which is formed in the protective insulating layer and the planarization layer located on the conductive member, and a second contact hole, which is formed in the protective insulating layer and the planarization layer located on the first upper power line.

Display device including conductive member electrically connected to power line

An electronic device according to various embodiments of the present invention comprises: an infrared filter for passing light in an infrared wavelength band; an image sensor for converting the received light into a video signal and outputting the video signal; an infrared light-emitting unit for emitting the light in the infrared wavelength band; and a processor. The processor can execute a first application, confirm a security level of the first application, and authorize the first application with an authority for controlling at least one of the image sensor, the infrared filter and the infrared light-emitting unit according to the confirmed security level of the first application.

Electronic device for processing video signal and computer readable recording medium

A display panel driver drives pixels based on first power having at least three voltage levels, second power having a constant voltage, and third power having two voltage levels. Each pixel includes a first transistor connected between first and second nodes and including a gate electrode to receive a scan signal, a second transistor connected between the second node and a third node in series with the first transistor and including a gate electrode to receive the third power, and a driving transistor connected between a source of the first power and the third node and including a gate electrode connected to the first electrode to control a driving current for an organic light emitting diode. A first capacitor is connected between a source of the third power and the first node, and a second capacitor is connected between the second node and one of the data lines.

Pixel and display device having the same

A pixel includes first, second, and third transistors, first and second capacitors, and an organic light emitting diode. The first transistor has a gate electrode connected to a first node, a first electrode that receives a first power voltage, and a second electrode connected to a second node. The second transistor has a gate electrode that receives a scan signal, a first electrode connected to the first node, and a second electrode connected to a third node. The third transistor has a gate electrode that receives a common control signal, a first electrode connected to the third node, and a second electrode connected to the second node. The organic light emitting diode has a first electrode connected to the second node and a second electrode that receives a second power voltage.

A pixel for a display panel includes first and second transistors, first and second capacitors, and an organic light emitting diode. The first transistor has a gate electrode connected to a first node, a first electrode connected to a first power source, and a second electrode connected to a second node. The second transistor has a gate electrode connected to a scan line, a first electrode connected to the first node, and a second electrode connected to the second node. The organic light emitting diode has a first electrode connected to the second node and a second electrode connected to a second power source. The first capacitor has a first electrode connected to a third power source and a second electrode connected to the first node. The second capacitor has a first electrode connected to a data line and a second electrode connected to the second node.

A pixel includes first to fourth transistors and a driving transistor. The first transistor is connected between a data line and a first node and has a gate electrode to receive a scan signal. The driving transistor is connected between the first node and a second node and has a gate electrode connected to a third node. The second transistor is connected between the second and third nodes and has a gate electrode to receive the scan signal. The third transistor is connected between first power and the first node and has a gate electrode to receive an emission signal. The fourth transistor is connected between the first and second nodes and has a gate electrode to receive an initialization signal. An organic light emitting diode is connected between the second node and second power. A storage capacitor is connected between the first power and third node.

An emission control driver includes a plurality of stages configured to output a plurality of emission control signals, respectively. Each stage includes an input circuit for receiving a previous emission control signal from one of previous stages or a vertical start signal, and configured to control a voltage of a first node and a voltage of a second node in response to a first clock signal; a stabilizing circuit for stabilizing the voltage of the first node in response to the voltage of the second node and a second clock signal; a voltage adjusting circuit connected between the second node and a third node, configured for boosting the voltage of the second node, and controlling the boosted voltage of the second node; and an output circuit configured to control an emission control signal in response to the voltage of the first node and a voltage of the third node.

Emission control driver and display device having the same

A display panel driver includes a plurality of stages. An N-th stage of the plurality of stages is configured to output a scan signal and an emission signal synchronized with each other based on a first power voltage, a second power voltage, and at least one clock signal. N is a natural number.

Display panel driver and display apparatus having the same

A display apparatus includes a plurality of pixels. Each pixel includes a first capacitor connected between a first voltage line receiving a driving signal and a first node; a first transistor comprising a control electrode connected to the first node, a first electrode connected to a second voltage line receiving a first power source signal, and a second electrode connected to a second node; an organic light emitting diode comprising an anode electrode connected to the second node and a cathode electrode receiving a second power source signal; a second capacitor connected between an m-th data line and the second node; a second transistor comprising a control electrode connected to an n-th gate line, a first electrode connected to the first node, and a second electrode connected to the second node; and a third transistor comprising a control electrode connected to an n-th scan line, a first electrode connected to the first voltage line, and a second electrode connected to the second node.

Display apparatus and method of driving the same

A gate driver includes a plurality of stages outputting a plurality of gate output signals, respectively. Each stage includes a first input circuit applying an input signal to a first node in response to a first clock signal, a second input circuit applying the first clock signal to a second node in response to a voltage of the first node, a first output circuit controlling a gate output signal to a first logic level in response to the voltage of the first node, a second output circuit controlling the gate output signal to a second logic level in response to a voltage of the second node, and a leakage current blocking circuit applying a first power voltage corresponding to the first logic level to the first input circuit in response to the voltage of the first node.

Gate driver and display device having the same

A display substrate includes a gate metal pattern including a gate line disposed on a base substrate and a gate electrode electrically connected with the gate line, an active pattern entirely overlapped with the gate metal pattern and comprising an oxide semiconductor and a data metal pattern disposed on the active pattern and including a data line, a source electrode electrically connected with the gate line and a drain electrode spaced apart from the source electrode. The active pattern has an overlapped region in which the active pattern is overlapped with the source electrode and the drain electrode and an exposed region in which the active pattern is not overlapped with the source electrode and the drain electrode. The thickness of the overlapping region and a thickness of the exposing region are same.

Display substrate and method of manufacturing the same

A method for calculating values of parameters of a TFT includes calculating a set of simulated current-voltage (I-V) values using state-density-functions over an entire energy band in a band gap of an amorphous semiconductor of the TFT. The method further includes comparing the set of simulated I-V values with a set of measured I-V values of the TFT to determine a value of a parameter of the TFT. The method may further include calculating values of an acceptor state-density-function gusing a set of electrostatic capacity-voltage (C-V) values of the TFT measured according to a frequency. The method may further include determining values of a donor state-density-function gand values of an interface state-density-function Dover the entire energy band in the band gap.

Method for calculating parameter values of thin-film transistor and apparatus for performing the method

A thin-film transistor includes a gate electrode, a source electrode, a drain electrode, a gate insulation layer and an oxide semiconductor pattern. The source and drain electrodes include a first metal element with a first oxide formation free energy. The oxide semiconductor pattern has a first surface making contact with the gate insulation layer and a second surface making contact with the source and drain electrodes to be positioned at an opposite side of the first surface. The oxide semiconductor pattern includes an added element having a second oxide formation free energy having an absolute value greater than or equal to an absolute value of the first oxide formation free energy, wherein an amount of the added element included in a portion near the first surface is zero or smaller than an amount of the added element included in a portion near the second surface.

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Suwon-si, South Korea

Jun-Hyun Park