Matsushita Electric Industrial Co., Ltd.

Panasonic Corporation

Jun Horikawa

Katsumi Murai

Eiichi Sadayuki

A semiconductor device includes a comparator which includes two input terminals and compares the voltage values between the power supply voltage which is inputted to one side input terminal and the reference voltage which is inputted to the other side input terminal. A resistor element connects two signal lines that are connected to the input terminals of the comparator One end of a capacitance element is connected to a power supply terminal for applying a power supply and the other end is connected to one input terminal of the comparator.

Semiconductor device with voltage variation detector

The object of the invention is the provision of a semiconductor memory having processor and memory integrally mounted on one chip. To attain the object, crossbar wirings are laid on the memory cell area and crossbar switches are disposed in the sense amplifier area or word driver area. Accordingly, memory sharing is made possible without increasing the chip area and it is also made possible to take out a large number of data continuously. Hence, a memory-embedded system with a high bandwidth can be provided.

Embedded semiconductor memory with crossbar wirings and switches for high bandwidth

The operating speed and stability of a semiconductor memory device of the type performing reading and writing at regular intervals are improved. A read/write pulse width controller varies the pulse width of a read/write pulse width control signal in such a manner that the width during reading is shorter than that during writing. A column decoder outputs a column-select signal having a pulse width equal to that of the read/write pulse width control signal. And a column-select gate connects an associated pair of bit lines to a pair of data lines while the column-select signal is high. During reading, a sufficiently long time can be allotted for equalizing potentials on the data lines. On the other hand, during writing, plenty of time can be allowed for connecting a pair of data lines to the pair of bit line. As a result, reading and writing can be performed stably enough at a sufficiently high speed.

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Shiga, Japan

Jun Horikawa