International Rectifier Corporation

Infineon Technologies Austria Ag

Jun Honda

Xiao-chang Cheng

Toshio Takahashi

Eddy Ying Yin Ho

David C Tam

Yong Li

Jong-Deog Jeong

Johan Tjeerd Strydom

Brian R Pelly

Dana S Wilhelm

Thomas Holm Hansen

Mathias Duppils

Gabriele Bernardinis

Niels Petersen

Pawan Garg

A method for designing a loudspeaker excursion estimator comprises measuring an excursion-related parameter for a loudspeaker, for each of a plurality of loudspeaker input signal levels and each of a plurality of loudspeaker input signal frequencies. The method further comprises, for each of the loudspeaker input signal frequencies and based on the measured excursion-related parameters, identifying a respective loudspeaker input signal level corresponding to a target maximum excursion-related parameter value. The method further comprises determining a filter response, based on the identified loudspeaker input signal levels and their respective loudspeaker input signal frequencies, and implementing a filter, based on the calculated filter response, for generating an excursion estimation based on loudspeaker input signal levels.

Measurement-based loudspeaker excursion limiting

In one embodiment, a method for detecting a load in a switched-mode power converter is provided. The switched-mode power converter includes high and low-side power switches which are configured to be driven respectively by high and low-side drive signals to provide a switching voltage. The high and low-side drive signals include a plurality of dead-time periods. The method includes monitoring a waveform of the switching voltage and at least one of the high and low-side drive signals. The monitored waveform of the switching voltage is compared to the monitored waveform of the at least one of the high and low-side drive signals to determine whether the switching voltage is high or low during at least one of the dead-time periods. A current measurement of the load is determined based on whether the switching voltage is high or low during the at least one of the dead-time periods.

Load detection for switched-mode power converters

A digital audio driver having a floating PWM input and for controlling a stage of high voltage, high speed high- and low-side MOSFETs series connected at a node. The driver includes a floating input interface circuit having a protection circuit to provide secure protection sequence against over-current conditions; and high and low side circuits for driving the high- and low-side MOSFETs, each high and low side circuit including a bi-directional current sensing circuit which requires no external shunt resistors that enables capture of over-current conditions at either positive or negative load current direction. The Rof the high- and low-side MOSFETs is used as current sensing resistors, once the Rexceeds a pre-determined threshold, an over current output signal is fed to the protection block to shutdown the MOSFET to protect the devices.

Protected digital audio driver

A circuit for minimizing voltage inrush upon startup in a switching power converter having a switching stage including high and low switches connected at a common node, a feedback loop for maintaining a target output voltage, an output capacitor connected between an output node and the ground, an inductor connected between the common node and the output node, and a control circuit having a first error amplifier for providing a first signal based on a comparison of a reference voltage and voltage provided by the feedback loop, the control circuit including a level switch connected between the ground and the common node, the level switch being controlled in accordance with the first signal, wherein a large inrush current flowing into the output capacitor when the circuit is starting up is minimized.

Method to reduce inrush voltage and current in a switching power converter

A Class D amplifier circuit in accordance with an embodiment of the present application includes a converter stage operable to provide a desired AC voltage and a Class D amplifier stage, connected to the converter stage. The Class D amplifier stage includes a first bi-directional switch connected to the converter stage, a second bi-directional switch, connected in series with the first bi-directional switch, wherein the first and second bi-directional switches are connected across the desired AC voltage provided by the converter stage and a controller operable to turn the first and second bi-directional switches ON and OFF such that a desired voltage is provided at a midpoint node positioned between the first bi-directional switch and the second bi-directional switch.

Class D amplifier circuit with bi-directional power switch

An over temperature detector circuit for use in a switching converter including one or more power switches in accordance with an embodiment of the present application includes a silent sense generator connected to at least one power switch and operable to detect a noise level of the switch and to provide a generator output signal indicative of absence of switching noise and a comparator operable to compare a temperature sensor signal from a temperature sensor with a reference voltage to provide an alarm signal indicating an over temperature condition when the temperature sensor signal exceeds the reference voltage, wherein the alarm signal does not indicate an over temperature condition when the generator output signal does not indicate absence of switching noise.

Switched mode power converter with over temperature detection

A dead-time generator for incorporation in an integrated circuit wherein the integrated circuit includes a high side and low side gate driver and wherein the high side and low side gate driver drive output switches such that a dead-time is provided between on times of the output switches, the dead-time generator comprising a circuit internal to the integrated circuit having an external terminal at which a dead-time setting component is connected, and wherein the dead-time generator comprises a circuit for providing a discrete dead-time for a range of dead-time setting values at the dead-time setting terminal and wherein, for a plurality of ranges of dead-time setting values at the dead-time setting terminal, the dead-time generator generates an associated plurality of discrete dead-times.

Gate driver with programmable dead-time insertion

A circuit for providing over-current protection, the circuit including a gate driver circuit for controlling a bridge circuit including a half bridge stage having high and low switches. The circuit includes a feedback loop circuit for counting over-current indicators sensed during one or more consecutive PWM cycles; wherein when an over-current indicator is sensed, the low switch is turned OFF for duration of a first time period after which the low switch is turned back ON, to enable determination of an over-current condition where false noise signals are rejected thereby preventing circuit shutdowns due to false over-current condition.

Noise immune over current protection with inherent current limiting for switching power converter

An apparatus and method for determining the output current in a bridge-connected switched transistor output circuit including high-side and low-side transistor switches, typically MOSFETS. The voltage at a common node between the high and low side switches is sensed, and offset in a first circuit by a fixed amount so that the voltage is positive for all positive or negative output currents of interest. The output current is actually determined in a second circuit which receives the offset voltage signal only predetermined times in relation to the on-time of the low side switch. The first circuit includes a current reference source/level shifter and a current mirror circuit formed of a plurality of transistors in a particular circuit configuration. The second circuit is coupled to an output of the first circuit by a gated NMOS transistor at the desired times to provide the current measurement signal. The second circuit includes a second current reference source having substantially the same electrical characteristics as the first current reference source, and a second plurality of transistors respectively matched to the input side circuit transistors, and connected in the same circuit configuration. In the second circuit, the offset signal is compared with high and low reference signals to provide an indication if the output current exceeds an overcurrent limit, either positively or negatively. The sensing circuit is advantageously integrated with the output circuit gate driver in a single IC.

Bi-directional current sensing by monitoring VS voltage in a half or full bridge circuit

An integrated noise isolation circuit on a single silicon substrate die having a structural arrangement that minimizes noise. The integrated circuit including a noise sensitive circuit including an input stage; a noise generating circuit including an output stage; at least one high voltage level shift circuit coupling the noise generating and noise sensitive circuits for transferring a signal from the input to the output stage; and at least one floating structure for isolating influence of the noise.

Noise free implementation of PWM modulator combined with gate driver stage in a single die

A gate drive circuit for driving the gate of a power transistor switch comprising a gate drive sourcing circuit supplying gate drive current to the power transistor switch, the gate drive sourcing circuit initially providing a first current to the gate of the power transistor switch and then providing a second current to the gate of the power transistor switch; a circuit for driving the gate drive sourcing circuit, the circuit having a first input for driving the gate drive sourcing circuit to turn on the power transistor switch by providing the first current, the circuit further having a second input coupled to a voltage across the power transistor switch and being controlled by the second input to cause the gate drive sourcing circuit to provide the second current when the voltage across the power transistor switch begins to drop as the power transistor switch begins to turn on.

Gate drive for lower switching noise emission

A method of minimizing an audible click noise from a speaker in a Class D audio power amplifier upon shutdown or startup of a switching stage having two switches series connected at a node, the speaker being connected to the node via an output filter comprising an inductor and a capacitor, the switches being controlled by a controller. The method including the steps of determining a timing interval at the node to transition a peak voltage of the capacitor, the capacitor voltage being a speaker voltage; and eliminating the audible transient voltage excursion across the speaker that causes a click noise during the timing interval, wherein at startup ON and OFF times of the switches are incrementally increased from zero to a normal mode and at shutdown the ON OFF times of the switches are incrementally decreased from the normal mode to zero.

Startup and shutdown click noise elimination for class D amplifier

A motor drive system control provides global closed loop feedback to cooperatively operate system components to adaptively reduce noise and provide noise cancellation feedback. An active EMI filter reduces differential and common mode noise on an input and provides a noise level indication to a system controller. Power switches in both a power converter and power inverter are cooperatively controlled with dynamic dv/dt control to reduce switching noise according to a profile specified by the controller. The dv/dt control is provided as an analog signal to a high voltage IC and codified as a pulse width for a level shifting circuit supplying control signals to the high voltage gate drive. A noise extraction circuit and technique obtain fast noise sampling to permit noise cancellation and adaptive noise reduction.

Global closed loop control system with DV/DT control and EMI/switching loss reduction

Provided is a gate driver circuit for a Class D audio amplifier with adaptive dV/dt control. The circuit includes an output switching stage, a gate driver capable of driving the output switching stage with a variable dV/dt; and a mode control circuit for setting an operating mode of the gate driver, wherein, the operating mode is selected from a plurality of operating modes, changes the dV/dt of the gate driver, corresponds to a power output level, and provides a balance point between a generated Electromagnetic Interference (EMI) and an efficiency of the switching stage.

Gate driver for Class D audio amplifier with adaptive dV/dt control

A method of protecting a MOSFET switch from overheating. The method is achieved by determining a ratio of ON resistance of the switch to resistance of a sense resistor, the sense resistor being series coupled in the source-drain circuit of the switch. Further, the ratio is compared to a reference signal and an output signal is generated when the ratio exceeds the reference signal.

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El Segundo, CA, United States of America

Jun Honda