Samsung Electronics Co., Ltd.

Jun-Ho Yoon

Hyun-Su Sim

Yoon-Sung Kim

Byung-Moon Bae

Yun-Hee Kim

Yun-hee Kim

Jung-ho Choi

Joon-Soo Park

Cheol-Kyu Lee

Heung-Sik Park

Methods of manufacturing a semiconductor chip are provided. The methods may include providing a semiconductor substrate including integrated circuit regions and a cut region. The cut region may be between the integrated circuit regions. The methods may also include forming a modified layer by emitting a laser beam into the semiconductor substrate along the cut region, polishing an inactive surface of the semiconductor substrate to propagate a crack from the modified layer, and separating the integrated circuit regions along the crack. The cut region may include a plurality of multilayer metal patterns on an active surface of the semiconductor substrate, which is opposite to the inactive surface of the semiconductor substrate. The plurality of multilayer metal patterns may form a pyramid structure when viewed in cross section.

Methods of manufacturing semiconductor chip

A semiconductor device includes a semiconductor substrate having a scribe lane defined therein. A plurality of semiconductor chips is formed on an upper surface of the semiconductor substrate. At least one conductive structure is arranged on an upper surface of the semiconductor substrate, within the scribe lane thereof. A fillet is arranged on at least one side surface of the conductive structure. The fillet is configured to induce a cut line which spreads along the scribe lane, through a central portion of the conductive structure.

Method of dicing a semiconductor substrate having a scribe lane defined therein

Semiconductor device, semiconductor chip and method of dicing a semiconductor substrate

A method of fabricating a semiconductor device is provided. The method can include forming a hard mask film including lower and upper hard mask films on a substrate in which an active region and an isolation region are defined and patterning the hard mask film to provide a hard mask pattern partially exposing the active region and the isolation region. An etchant can be applied to the active and isolation regions using the hard mask pattern as an etching mask to form a trench in the active region of the substrate while avoiding substantially etching the isolation region exposed to the etchant and a gate can be formed on the trench.

Methods of forming semiconductor devices using selective etching of an active region through a hardmask

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Seoul, South Korea

Jun-Ho Yoon