Korea Advanced Institute of Science and Technology

Jun Beom Seo

Jae Hyun Lee

Jaekyun Moon

Min Cheol Shin

Doo Hyung Kang

Sung Whan Yoon

Woo Jin Jeong

A data processing method by learning of a neural network may be provided. The data processing method by the learning of a neural network includes: obtaining a first set of output values by processing a first set of input values of a task by the neural network; forming a projection space on the basis of the first set of output values; obtaining a second set of output values by processing a second set of input values out of input values of the task by the neural network; projecting the second set of output values onto the projection space; and performing processing the second set of output values in the projection space.

Data processing apparatus by learning of neural network, data processing method by learning of neural network, and recording medium recording the data processing method

A negative capacitance logic device includes a first field effect transistor (FET) and a second FET. The first FET is coupled between a power supply voltage and an output node, and the first FET includes a ferroelectric having a negative capacitance. The second FET is coupled between the output node and a ground voltage, and the second FET includes a ferroelectric having a negative capacitance. The negative capacitance logic differentiates an input voltage applied to an input node to provide an output voltage at the output node.

Negative capacitance logic device, clock generator including the same and method of operating clock generator

Growing community of inventors

Daejeon, South Korea

Jun Beom Seo