Nxp B.v.

Julien M M Michelon

Roel Daamen

Viet Nguyen Hoang

Pascal Bancken

Robertus A M Wolters

Phillip Christie

Martinus P M Maas

The invention relates to a semiconductor device manufactured in a process technology, the semiconductor device having at least one wire located in an interconnect layer of said semiconductor device, the at least one wire having a wire width (W) and a wire thickness (T), the wire width (W) being equal to a minimum feature size of the interconnect layer as defined by said process technology, wherein the minimum feature size is smaller than or equal to 0.32 &#x3bc;m, wherein the aspect ratio (AR) of the at least one wire is smaller than 1.5, the aspect ratio (AR) being defined as the wire thickness (T) divided by the wire width (W). The invention further discloses a method of manufacturing such a semiconductor device.

Semiconductor device for low-power applications and a method of manufacturing thereof

A damascene process is described using a copper fill process to fill a trench (). The copper fill () is started with a deposited seed layer which includes () copper and titanium. Some titanium migrates to the surface during the copper fill process. The structure is annealed in a nitrogen atmosphere which creates a self-aligned TiN barrier () at the surface of the copper fill (). Air gaps () may be created in the same annealing process. The process may be used to form a multilayer structure.

Method of making an interconnect structure

Growing community of inventors

Le Boulay, France

Julien M M Michelon