Abb Schweiz Ag

Jukka-Pekka Sjoroos

Kari Tikkanen

Eddy C Aeloiza

Liming Liu

Arun Kumar Kadavelugu

Joonas Puukko

Estimating junction temperature in a power semiconductor includes monitoring electrical current direction so as to determine which of a first and a second power semiconductor is in an on-state, and sensing a voltage drop across the one of the power semiconductors. Voltage drop may be correlated with temperature according to a gain dependent upon a level of the electrical current.

Temperature estimation in power semiconductor device in electric drive system

Unique systems, methods, techniques and apparatuses of semiconductor failure prognostication. One exemplary embodiment is a power converter comprising a semiconductor switch and a converter control system. The converter control system is configured to turn on the semiconductor switch, measure a first voltage and a current during reverse conduction, estimate junction temperature of the semiconductor device, turn off the semiconductor device, measure a second voltage after turning off the semiconductor device, determine a resistance value using the second voltage measurement, determine an expected resistance value, predict a failure of the semiconductor device using the resistance value and the expected resistance value, and transmit a semiconductor device failure warning.

Semiconductor failure prognostication

Monitoring aging in an electric drive system includes energizing the electric drive system such that electrical current flows through a power semiconductor device therein, determining a value indicative of a voltage across the power semiconductor device, at a current level where voltage is substantially independent of temperature, comparing the determined value with a reference value, and outputting a signal responsive to a difference between the values that is indicative of an aging state of the power semiconductor device.

Aging determination of power semiconductor device in electric drive system

Unique systems, methods, techniques and apparatuses of a gate driver are disclosed herein. One exemplary embodiment is a gate driver comprising a first and second DC rail, a first converter arm including a first and second semiconductor device, a second converter arm including a third and fourth semiconductor device, an inductor, and a controller. The controller is configured to open and close the primary switching device by operating the semiconductor devices so as to transmit power between the gate driver and a gate of a primary switching device. The controller is configured to transmit a gate signal to the primary switching device by closing the second semiconductor device, then opening the second semiconductor device and closing the fourth semiconductor device in response to the gate of the primary switching device receiving power with a voltage greater than or equal in magnitude to the voltage of the second DC rail.

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Brookfield, WI, United States of America

Jukka-Pekka Sjoroos