Realtek Semiconductor Inc.

Powerchip Semiconductor Corporation

Jui-Yuan Lin

Yen-Ju Lu

Ping-Yang Chen

Chin-Chi Chen

Shu-Ming Kuo

Yi-Chang Yang

Chih-Peng Liao

Ying-wei Wang

The present disclosure discloses a command accessing method having power saving mechanism is provided that includes steps outlined below. A cache control circuit is controlled to retrieve a plurality of commands from a command source to be executed. A plurality of loop commands corresponding to a loop procedure included in the commands are determined, wherein the loop commands include a first part that matches a storage amount of a command buffer circuit and a second part that exceeds the storage amount. The cache control circuit is controlled to store the first part of the loop commands to the command buffer circuit and not store the second part of the loop commands to the command buffer circuit. The cache control circuit is controlled to, every time the loop procedure is performed, retrieve and execute the first part of the loop commands from the command buffer circuit and retrieve and execute the second part of the loop commands from the command source.

Electronic apparatus and command accessing method thereof having power saving mechanism

A cache and a method for managing a cache are provided. The cache includes a storage circuit, a buffer circuit and a control circuit. The buffer circuit stores data in a first-in first-out (FIFO) manner. The control circuit is coupled to the storage circuit and the buffer circuit and is configured to find a storage space in the storage circuit and write the data to the storage space.

Cache and method for managing cache

A signal synchronizing device includes a trigger module for capturing an input signal according to a first clock signal which corresponds with the input signal so as to generate a trigger signal, a storage unit for forming a first pulse signal by pulling an output thereof to a first logic level according to the trigger signal, and by pulling the output thereof to a second logic level according to a feedback reset signal, and a synchronizing module for performing synchronous transfer according to the first pulse signal so as to output an output signal corresponding with frequency of a second clock signal, and for generating the feedback reset signal according to the output signal.

Signal synchronizing device

A controlling apparatus includes: a storage device arranged for storing at least one Byte Enable property compatible to a processing device; and a controlling circuit coupled to the storage device for generating at least one Byte Enable signal to the processing device according to the Byte Enable property compatible with the processing device.

Controlling apparatus and data transmitting system applying the controlling apparatus and method thereof

A pipe trap comprising a body, a disc filter, a pipe and a plurality of mesh filter suitable for filtering gases is provided. The pipe trap body has a gas inlet and a gas outlet. The disc filter and the mesh filters are enclosed inside the pipe trap body. One end of the pipe connects with the disc filter and the other end of the pipe connects with the gas outlet. The mesh filters are enclosed inside the pipe. Using a multi-stage filtering method, liquid matter separates out first and then gaseous particles are filtered according to the particle size so that the pipe trap has a high filtering efficiency.

Growing community of inventors

Chiayi County, Taiwan

Jui-Yuan Lin