Taiwan Semiconductor Manufacturing Comp. Ltd.

Jui-Mu Cho

Chyi-Tsong Ni

I-Shi Wang

Ching-Hou Su

Wun-Kai Tsai

Jeng-Hao Lin

Yun-Tai Shih

Kuan-Ming Pan

Chun-Chih Lin

Yung-Chang Huang

Chien-Hsun Pan

A method of aligning two wafers during a bonding process includes aligning a first wafer having a plurality of alignment markings with a second wafer having a plurality of alignment markings. The method further includes placing a plurality of flags between the first wafer and the second wafer. The method further includes detecting movement of the plurality of flags with respect to the first wafer and the second wafer using at least one sensor. The method further includes determining whether the wafers remain aligned within an alignment tolerance based on the detected movement of the plurality of flags relative to the first wafer and the second wafer.

Wafer bonding method and wafer bonding apparatus

An apparatus includes an alignment module configured to align a first wafer and a second wafer based on alignment markers on the first wafer and corresponding alignment markers on the second wafer. The apparatus further includes a flag placement module configured to insert a plurality of flags between the first wafer and the second wafer, a flag-out mechanism configured to simultaneously move the plurality of flags to a flag-out position, and a controller configured to determine whether the wafers remain aligned within an alignment tolerance based on an amount of time for each flag of the plurality of flags to reach the flag-out position.

Bonding alignment tool

An apparatus includes a bonding system configured to bond at least two wafers. The bonding system has a flag-out mechanism configured to remove a plurality of flags from an area between the at least two wafers. The apparatus also includes sensors configured to detect data related to a flag-out condition of the flags of the plurality of flag. The apparatus further includes at least one processor configured to receive inputs from the sensors, to calculate at least one value related to flag-out timing, and to drive a display indicating an alignment of the at least two wafers.

Detection methods for an electroplating process are provided. A detection method includes immersing a substrate into an electrolyte solution to perform an electroplating process. The electrolyte solution includes an additive agent. The detection method also includes immersing a detection device into the electrolyte solution. The detection method further includes applying a first alternating current (AC) voltage or direct current (DC) voltage to the detection device to detect the concentration of the additive agent. In addition, the detection method includes applying a combination of a second AC voltage and a second DC voltage to the detection device to inspect the electrolyte solution. An impurity is detected in the electrolyte solution. The detection method also includes replacing the electrolyte solution containing the impurity with another electrolyte solution.

Detection method for electroplating process

An apparatus is disclosed for detecting flag velocity during a eutectic process for bonding two wafers. The apparatus includes a plurality of sensors for detecting a time and/or velocity of a plurality of flags within a flag-out mechanism. The apparatus also includes one or more displays displaying time durations associated with the movement of the flags during the bonding process. Also disclosed is a method of aligning wafers in a eutectic bonding process. The method includes determining one or more time durations associated with the movement of the flags in the plurality of flags. The method also includes determining if a misalignment has occurred based on the one or more time durations associated with the movement of the flags.

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Chupei, Taiwan

Jui-Mu Cho