Taiwan Semiconductor Manufacturing Comp. Ltd.

Jui-Chun Weng

Hsi-Cheng Hsu

Ji-Hong Chiang

Hsin-Yu Chen

Wei-Ding Wu

Ching-Hsiang Hu

Shyh-Wei Cheng

Han-Zong Pan

You-Cheng Jhang

Lavanya Sanagavarapu

Chia-Chun Hung

Chih-Yu Wang

Kuo-Hao Lee

Jia-Syuan Li

Hsin-yu Chen

Chun-Peng Li

Jiun-Jie Chiou

Shin-Hua Chen

Yen-Chiang Liu

Che-Jung Chu

Chia-Yu Lin

Yu-Ting Hsu

Sheng-Yuan Lin

Shiuan-Jeng Lin

Chiu-Hua Chung

Li-Yang Tu

Jung-Kuo Tu

Yu-Pei Chiang

Yu-Jui Wu

Chuan-Yi Ko

Yen Chiang Liu

Chien-Tai Su

Yen-Chieh Tu

Chin-Min Lin

Jong Chen

Chih-Shan Chen

Ming-Yi Lin

Yi-Cheng Chiu

Hung-Lin Chen

Yuh-Hwa Chang

Ming-Tsung Chen

Tai-Kun Kao

Tian Sheng Lin

Chao-Po Lu

Ming-Tai Chung

Cheng-San Chou

Kang-Tai Peng

Chung-Hsien Hun

Chung-Hsien Hung

Chih-Hsien Chen

Yu-Mei Wu

Chen-Chung Li

Chi-Chieh Wang

Wei-Kuan Yen

Chen-Wei Chiang

Chia Yu Lin

Albion Pan

Bob Sun

In some embodiments, a semiconductor device is provided. The semiconductor device includes a semiconductor layer, a micro-electromechanical systems (MEMS) structure defined in the semiconductor layer, a bond ring over the semiconductor layer, and a cap structure over the MEMS structure and bonded to the bond ring. The MEMS structure has an upper surface and the cap structure has a lower surface facing the upper surface of the MEMS structure. Dimples of eutectic material are on the upper surface of the MEMS structure.

Semiconductor structure and method of making

In a method of fabricating at least one IC, doped regions are formed on a semiconductor wafer using a first photolithography mask, including at least one doped region of a test structure. Active regions are formed on the semiconductor wafer using a second photolithography mask, including active regions of the test structure. Electrical contacts are formed on the active regions of the test structure. Electrical resistances are measured between pairs of active regions of the test structure using the electrical contacts. At least one metric is determined indicating whether the doped regions are spatially aligned with the active regions based on the measured electrical resistances. In response to the at least one metric indicating the doped regions are spatially aligned with the active regions, completing fabrication of the at least one integrated circuit.

Test structure and integrated circuit test using same

Alignment of devices formed on substrates that are to be bonded may be achieved through the use of scribe lines between the devices, where the scribe lines progressively increase or decrease in size from a center to an edge of one or more of the substrates to compensate for differences in the thermal expansion rates of the substrates. The devices on the substrates are brought into alignment as the substrates are heated during a bonding operation due to the progressively increased or decreased sizes of the scribe lines. The scribe lines may be arranged in a single direction in a substrate to compensate for thermal expansion along a single axis of the substrate or may be arranged in a plurality of directions to compensate for actinomorphic thermal expansion.

Wafer bonding alignment

Disclosed is a cost-effective method to fabricate a multifunctional collimator structure for contact image sensors to filter ambient infrared light to reduce noises. In one embodiment, an optical collimator, includes: a dielectric layer; a substrate; a plurality of via holes; and a conductive layer, wherein the dielectric layer is formed over the substrate, wherein the plurality of via holes are configured as an array along a lateral direction of a first surface of the dielectric layer, wherein each of the plurality of via holes extends through the dielectric layer and the substrate from the first surface of the dielectric layer to a second surface of the substrate in a vertical direction, and wherein the conductive layer is formed over at least one of the following: the first surface of the first dielectric layer and a portion of sidewalls of each of the plurality of via holes, and wherein the conductive layer is configured so as to allow the optical collimator to filter light in a range of wavelengths.

Multifunctional collimator for contact image sensors

A portion of a buffer layer on a backside of a substrate of a photomask assembly may be removed prior to formation of one or more capping layers on the backside of the substrate. The one or more capping layers may be formed directly on the backside of the substrate where the buffer layer is removed from the substrate, and a hard mask layer may be formed directly on the one or more capping layers. The one or more capping layers may include a low-stress material to promote adhesion between the one or more capping layers and the substrate, and to reduce and/or minimize peeling and delamination of the capping layer(s) from the substrate. This may reduce the likelihood of damage to the pellicle layer and/or other components of the photomask assembly and/or may increase the yield of an exposure process in which the photomask assembly is used.

Photomask assembly and method of forming the same

A method for treating a micro electro-mechanical system (MEMS) component is disclosed. In one example, the method includes the steps of providing a first wafer, treating the first wafer to form cavities and at least an oxide layer on a top surface of the first wafer using a first chemical vapor deposition (CVD) process, providing a second wafer, bonding the second wafer on a top surface of the at least one oxide layer, treating the second wafer to form a first plurality of structures, depositing a layer of Self-Assembling Monolayer (SAM) to a surface of the MEMS component using a second CVD process.

Anti-stiction process for MEMS device

A photomask assembly may be formed such that stress relief trenches are formed in a pellicle frame of the photomask assembly. The stress relief trenches may reduce or prevent damage to a pellicle that may otherwise result from deformation of the pellicle. The stress relief trenches may be formed in areas of the pellicle frame to allow the pellicle frame to deform with the pellicle, thereby reducing the amount damage to the pellicle caused by the pellicle frame.

Pellicle frame with stress relief trenches

Disclosed is a method to fabricate a multifunctional collimator structure In one embodiment, an optical collimator, includes: a dielectric layer; a substrate; and a plurality of via holes, wherein the dielectric layer is formed over the substrate, wherein the plurality of via holes are configured as an array along a lateral direction of a first surface of the dielectric layer, wherein each of the plurality of via holes extends through the dielectric layer and the substrate from the first surface of the dielectric layer to a second surface of the substrate in a vertical direction, wherein the substrate has a bulk impurity doping concentration equal to or greater than 1×10per cubic centimeter (cm) and a first thickness, and wherein the bulk impurity doping concentration and the first thickness of the substrate are configured so as to allow the optical collimator to filter light in a range of wavelengths.

A micro-electromechanical-system (MEMS) device may be formed to include an anti-stiction polysilicon layer on one or more moveable MEMS structures of a device wafer of the MEMS device to reduce, minimize, and/or eliminate stiction between the moveable MEMS structures and other components or structures of the MEMS device. The anti-stiction polysilicon layer may be formed such that a surface roughness of the anti-stiction polysilicon layer is greater than the surface roughness of a bonding polysilicon layer on the surfaces of the device wafer that are to be bonded to a circuitry wafer of the MEMS device. The higher surface roughness of the anti-stiction polysilicon layer may reduce the surface area of the bottom of the moveable MEMS structures, which may reduce the likelihood that the one or more moveable MEMS structures will become stuck to the other components or structures.

Roughness selectivity for MEMS movement stiction reduction

Disclosed is a cost-effective method to fabricate a multifunctional collimator structure for contact image sensors to filter ambient infrared light to reduce noises. In one embodiment, an optical collimator, includes: a dielectric layer; a substrate; a plurality of via holes; and a conductive layer, wherein the dielectric layer is formed over the substrate, wherein the plurality of via holes are configured as an array along a lateral direction of a first surface of the dielectric layer, wherein each of the plurality of via holes extends through the dielectric layer and the substrate from the first surface of the dielectric layer to a second surface of the substrate in a vertical direction.

Disclosed is a method to fabricate a multifunctional collimator structure In one embodiment, an optical collimator, includes: a dielectric layer; a substrate; and a plurality of via holes, wherein the dielectric layer is formed over the substrate, wherein the plurality of via holes are configured as an array along a lateral direction of a first surface of the dielectric layer, wherein each of the plurality of via holes extends through the dielectric layer and the substrate from the first surface of the dielectric layer to a second surface of the substrate in a vertical direction, wherein the substrate has a bulk impurity doping concentration equal to or greater than 1&#xd7;10per cubic centimeter (cm) and a first thickness, and wherein the bulk impurity doping concentration and the first thickness of the substrate are configured so as to allow the optical collimator to filter light in a range of wavelengths.

Growing community of inventors

Taipei, Taiwan

Jui-Chun Weng