Taiwan Semiconductor Manufacturing Comp. Ltd.

Jui-Chun Peng

Heng-Hsin Liu

Yung-Yao Lee

Chin-Hsiang Lin

Ho-Ping Chen

Wei-Hsiang Tseng

Heng-Jen Lee

Tung-Li Wu

Hung-Ming Kuo

Kuo-Hung Chao

Chun-Hung Lin

Hsu-Shui Liu

I-Hsiung Huang

Cheng-Kang Hu

Jacky Chung

Chi-Ming Yang

Chao-Hsiung Wang

Jong-I Mou

Chyi Shyuan Chern

Chun-Hsien Lin

Yen-Di Tsen

Yung-Cheng Chen

Yi-Ping Hsieh

Kai-Fa Ho

Jian-Yuan Su

Tzu Jeng Hsu

Ho-Ping Cheng

Chia-Yun Lee

A cooling controller receives, from one or more sensors, wafer information associated with a wafer. The cooling controller determines a pattern mask area for the wafer based on the wafer information. The cooling controller determines a cooling time for the wafer based on the pattern mask area. The cooling controller causes a cooling plate to cool the wafer for a time duration equal to the cooling time. Determining the cooling time for a wafer based on a pattern mask area provides stable and consistent wafer temperatures for wafers having different mask and layout properties, which reduces mask overlay variation and increases wafer yield.

Semiconductor wafer cooling

In a method executed in an exposure apparatus, a focus control effective region and a focus control exclusion region are set based on an exposure map and a chip area layout within an exposure area. Focus-leveling data are measured over a wafer. A photo resist layer on the wafer is exposed with an exposure light. When a chip area of a plurality of chip areas of the exposure area is located within an effective region of a wafer, the chip area is included in the focus control effective region, and when a part of or all of a chip area of the plurality of chip areas is located on or outside a periphery of the effective region of the wafer, the chip area is included in the focus control exclusion region In the exposing, a focus-leveling is controlled by using the focus-leveling data measured at the focus control effective region.

Exposure method and exposure apparatus

A wafer alignment apparatus includes a light source, a light detection device, and a rotation device configured to rotate a wafer. The light source is configured to provide a light directed to the wafer. The light detection device is configured to detect reflected light intensity from the wafer to locate at least one wafer alignment mark of wafer alignment marks separated by a plurality of angles. At least two of those angles are equal.

Wafer alignment mark scheme

An electromagnetic radiation generation apparatus includes a collector, a gas supplier and a gas pipeline. The collector has a reflection surface configured to reflect an electromagnetic radiation. The collector includes a bottom portion, a perimeter portion, and a middle portion between the bottom portion and the perimeter portion. The middle portion of the collector includes a plurality of openings. The gas supplier is configured to provide a buffer gas. The gas pipeline is in communication with the gas supplier and the collector, and configured to purge the buffer gas through the openings of the middle portion to form a gas protection layer near the reflection surface of the collector. The openings of the middle portion include a plurality of holes arranged in an array including a plurality of rows of holes, or a plurality of concentric gaps.

Apparatus and method for generating an electromagnetic radiation

In a method for fabricating a resist pattern, a substrate coated with a photo resist is loaded on a stage of an exposure apparatus. Underlying patterns are fabricated on the substrate. A surface slope of an exposure area on the substrate is measured. An alignment measurement is performed by detecting an alignment pattern formed in the underlying patterns. An alignment measurement result is corrected based on the measured surface slope. The substrate is aligned to a photo mask by using the corrected alignment measurement result. The photo resist is exposed to radiation passing through the photo mask to form patterns.

Patterning method and patterning apparatus for fabricating a resist pattern

A semiconductor method is disclosed. The semiconductor method is performed upon semiconductor wafers, wherein each of the semiconductor wafers includes a first exposure field and a second exposure field, and each of the first exposure field and the second exposure field includes a first alignment mark and a second alignment mark. The method includes: determining a first alignment pattern for a first wafer by selecting one of the alignment marks of the first exposure field, and selecting one of the alignment marks of the second exposure field; performing the aligning operation upon the first semiconductor wafer by using the first alignment pattern; determining a second alignment pattern for a second wafer by selecting one of the alignment marks of the first exposure field, and selecting one of the alignment marks of the second exposure field, wherein the first alignment pattern is different from the second alignment pattern.

Semiconductor method and associated apparatus

A wafer alignment apparatus includes a light source, a light detection device, and a rotation device configured to rotate a wafer. The light source is configured to provide light directed to the wafer. The light detection device is configured to detect reflected light intensity from the wafer to locate at least one wafer alignment mark of wafer alignment marks separated by a plurality of angles. At least two of those angles are equal.

The present disclosure relates to a method of semiconductor processing. The method includes, receiving a first wafer having a photoresist coating on a face of the first wafer. An exposure unit is used to perform a first number of radiation exposures on the photoresist coating, thereby forming an exposed photoresist coating. The exposed photoresist coating is developed, thereby forming a developed photoresist coating. An OVL measurement zone pattern is selected from a number of different, pre-determined OVL measurement zone patterns based on at least one of: the first number of radiation exposures performed on the first wafer or a previous number of radiation exposures performed on a previously processed wafer, which was processed before the first wafer. A number of OVL measurements are performed on the developed photoresist coating within the selected OVL measurement zone pattern.

Synchronized integrated metrology for overlay-shift reduction

The present disclosure relates to an extreme ultraviolet (EUV) radiation source having a collector mirror oriented to reduce contamination of fuel droplet debris. In some embodiments, the EUV radiation source has a fuel droplet generator that provides a plurality of fuel droplets to an EUV source vessel. A primary laser is configured to generate a primary laser beam directed towards the plurality of fuel droplets. The primary laser beam has a sufficient energy to ignite a plasma from the plurality of fuel droplets, which emits extreme ultraviolet radiation. A collector mirror, configured to focus the extreme ultraviolet radiation to an exit aperture of the EUV source vessel, which is oriented so that a normal vector extending outward from a vertex of the collector mirror intersects a direction of a gravitation force by an angle that is less than 90&#xb0;.

EUV collector with orientation to avoid contamination

A method of heating/cooling one or more substrates includes placing the one or more substrates on a rotatable hot-cold plate, wherein each substrate of the one or more substrates is placed on a corresponding sub-plate of a plurality of sub-plates of the rotatable hot-cold plate. The method further includes rotating the one or more substrates, wherein rotating the one or more substrates comprises rotating each substrate of the one or more substrates independently. The method further includes heating or cooling the one or more substrates using a heating-cooling element, wherein rotating the one or more substrates comprises rotating the one or more substrates relative to the heating-cooling element.

Method of heating/cooling a substrate

A lithography apparatus includes a plurality reticle edge masking assemblies (REMAs), wherein each REMA of the plurality of REMAs is positioned to receive one of a plurality of light beams, and each REMA of the plurality of REMAs comprises a movable slit for passing the received light beam therethrough. The lithography apparatus includes a controller for controlling a speed of the movable slit based on a size of the movable slit, an intensity of the one or more collimated light beams, or a material to be patterned. The lithography apparatus further includes a single mask having a single pattern, wherein the mask is configured to receive light from every REMA of the plurality of REMAs. The lithography apparatus includes a projection lens configured to receive light transmitted through the single mask, wherein the lithography apparatus is configured to introduce an immersion liquid into a space adjacent to the projection lens.

Lithography apparatus having dual reticle edge masking assemblies and method of use

An immersion lithography apparatus includes a lens system, an immersion hood, a wafer stage, an inspection system and a cleaning fluid supplier. The lens system is configured to project a pattern onto a wafer. The immersion hood is configured to confine an immersion fluid between the lens system and the wafer, and includes a peripheral hole configured to suck up the immersion fluid. The wafer stage is configured to position the wafer under the lens system. The inspection system is configured to detect whether there is contamination in the peripheral hole. The cleaning fluid supplier is coupled to the inspection system and configured to supply a cleaning fluid through the peripheral hole to remove the contamination, in which the inspection system and the cleaning fluid supplier are coupled to the wafer stage.

Growing community of inventors

Hsinchu, Taiwan

Jui-Chun Peng