Samsung Electronics Co., Ltd.

Juhyung Kim

Kihyun Hwang

Phil Ouk Nam

Woonkyung Lee

Jaegoo Lee

Jaeyoung Ahn

Junkyu Yang

Chaeho Kim

Hansoo Kim

Byeong-In Choe

Changseok Kang

Byong-Hyun Jang

Byong-hyun Jang

A semiconductor memory device and a method of fabricating the same. The device includes a plurality of gates vertically stacked on a top surface of a substrate with an epitaxial layer formed in the substrate, a vertical channel vertically penetrating the gates to be electrically connected to the epitaxial layer, and a memory layer provided between the vertical channel and the gates. The epitaxial layer has a top surface positioned at a level between a bottom surface of the lowermost one of the gates and the top surface of the substrate.

Semiconductor memory devices and methods of fabricating the same

An erase method of a charge trap flash memory device, the method including receiving a temperature detection result, and performing an erase operation based on the temperature detection result, wherein the erase operation includes an erase execution interval, an erase verify interval and a delay time between the erase execution interval and the erase verify interval, wherein the erase operation changes a level of a word line voltage applied to word lines during the erase execution interval, a length of the delay time, or a level of the word line voltage applied to the word lines during the delay time.

Charge trap flash memory device and an erasing method thereof

Growing community of inventors

Yongin-si, South Korea

Juhyung Kim